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HD6433636SW Folha de dados(PDF) 27 Page - Renesas Technology Corp |
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HD6433636SW Folha de dados(HTML) 27 Page - Renesas Technology Corp |
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27 / 418 page ![]() 13 Section 2 CPU 2.1 Overview The H8/300L CPU has sixteen 8-bit general registers, which can also be paired as eight 16-bit registers. Its concise, optimized instruction set is designed for high-speed operation. 2.1.1 Features Features of the H8/300L CPU are listed below. • General-register architecture Sixteen 8-bit general registers, also usable as eight 16-bit general registers • Instruction set with 55 basic instructions, including: Multiply and divide instructions Powerful bit-manipulation instructions • Eight addressing modes Register direct Register indirect Register indirect with displacement Register indirect with post-increment or pre-decrement Absolute address Immediate Program-counter relative Memory indirect • 64-kbyte address space • High-speed operation All frequently used instructions are executed in two to four states High-speed arithmetic and logic operations 8- or 16-bit register-register add or subtract: 0.4 µs* 8 × 8-bit multiply: 2.8 µs* 16 ÷ 8-bit divide: 2.8 µs* • Low-power operation modes SLEEP instruction for transition to low-power operation Note: * These values are at ø = 5 MHz. |
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