HD6433636SW datasheet(82/418 Pages) RENESAS

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Bit 2—Timer FL Interrupt Request Flag (IRRTFL)

Bit 2: IRRTFL

Description

[Clearing conditions]

(initial value)

When IRRTFL = 1, it is cleared by writing 0

[Setting conditions]

When counter FL matches output compare register FL in 8-bit timer mode

Bit 1—Timer Y Interrupt Request Flag (IRRTY)

Bit 1: IRRTY

Description

[Clearing conditions]

(initial value)

When IRRTY is 1, it is cleared by writing 0 to IRRTYC

[Setting conditions]

When the timer Y counter value overflows (from H’FFFF to H’0000)

Note:

This bit is read-only. It is cleared by writing 0 to bit 0 (IRRTYC).

Bit 0—Timer Y Interrupt Request Clear Flag (IRRTYC): Bit 0 is a special bit for clearing

the IRRTY interrupt request flag. Writing 0 to this bit clears bit 1 (IRRTY) to 0. Note that

writing 0 to this bit does not give the bit itself a value of 0.

Bit 0 is always read as 1, and only a write of 0 to this bit is valid.

Wakeup Interrupt Request Register (IWPR)

Bit

76543210

IWPF7

IWPF6

IWPF5

IWPF4

IWPF3

IWPF2

IWPF1

IWPF0

Initial value

00000000

Read/Write

R/W*

Note: * Only a write of 0 for flag clearing is possible.

IWPR is an 8-bit read/write register, in which the corresponding bit is set to 1 when pins

WKP

7 to

WKP

0 are set to wakeup input and a pin receives a falling edge input. The flags are not cleared

automatically when an interrupt is accepted. It is necessary to write 0 to clear each flag.

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