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HD6433636SW Folha de dados(PDF) 16 Page - Renesas Technology Corp |
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HD6433636SW Folha de dados(HTML) 16 Page - Renesas Technology Corp |
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16 / 418 page ![]() 2 Table 1.1 Features Item Description CPU High-speed H8/300L CPU • General-register architecture General registers: Sixteen 8-bit registers (can be used as eight 16-bit registers) • Operating speed Max. operating speed: 5 MHz Add/subtract: 0.4 µs (operating at ø= 5 MHz) Multiply/divide: 2.8 µs (operating at ø= 5 MHz) Can run on 32.768 kHz subclock • Instruction set compatible with H8/300 CPU Instruction length of 2 bytes or 4 bytes Basic arithmetic operations between registers MOV instruction for data transfer between memory and registers • Instruction features Multiply (8 bits × 8 bits) Divide (16 bits ÷ 8 bits) Bit accumulator Register-indirect designation of bit position Interrupts 30 interrupt sources • 13 external interrupt sources: IRQ 4 to IRQ 0, WKP 7 to WKP0 • 17 internal interrupt sources Clock pulse generators Two on-chip clock pulse generators • System clock pulse generator: 1 MHz to 10 MHz • Subclock pulse generator: 32.768 kHz Power-down modes Six power-down modes • Sleep mode • Standby mode • Watch mode • Subsleep mode • Subactive mode • Active (medium-speed) mode |
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