HD6433636SW datasheet(78/418 Pages) RENESAS

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Interrupt Enable Register 2 (IENR2)

Bit

76543210

IENDT

IENAD

—

IENTG

IENTFH

IENTFL

IENTY

—

Initial value

00000001

Read/Write

R/W

—

R/W

—

IENR2 is an 8-bit read/write register that enables or disables interrupt requests.

Bit 7—Direct Transfer Interrupt Enable (IENDT): Bit 7 enables or disables direct transfer

interrupt requests.

Bit 7: IENDT

Description

Disables direct transfer interrupt requests

(initial value)

Enables direct transfer interrupt requests

Bit 6—A/D Converter Interrupt Enable (IENAD): Bit 6 enables or disables A/D converter end

interrupt requests.

Bit 6: IENAD

Description

Disables A/D converter interrupt requests

(initial value)

Enables A/D converter interrupt requests

Bit 5—Reserved Bit: Bit 5 is reserved: it is always read as 0, and should be used cleared to 0.

Bit 4—Timer G Interrupt Enable (IENTG): Bit 4 enables or disables timer G input capture and

overflow interrupt requests.

Bit 4: IENTG

Description

Disables timer G interrupts

(initial value)

Enables timer G interrupts

Bit 3—Timer FH Interrupt Enable (IENTFH): Bit 3 enables or disables timer FH compare

match and overflow interrupt requests.

Bit 3: IENTFH

Description

Disables timer FH interrupts

(initial value)

Enables timer FH interrupts

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