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GD32H757ZMT7 Folha de dados(PDF) 108 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD32H757ZMT7 Folha de dados(HTML) 108 Page - GigaDevice Semiconductor (Beijing) Inc. |
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108 / 151 page ![]() GD32H757xx Datasheet 107 Speed Symbol Parameter Conditions Min Typ Max Unit level fall time and output low to high level rise time 1.71 V ≤ VDD ≤ 2.5 V, CL = 30 pF — 2.8 — 1.71 V ≤ VDD ≤ 2.5 V, CL = 10 pF — 1.8 — 11 tr/tf(2) Output high to low level fall time and output low to high level rise time 1.71 V ≤ VDD ≤ 2.5 V, CL = 50 pF — 3.5 — ns 1.71 V ≤ VDD ≤ 2.5 V, CL = 30 pF — 2.6 — 1.71 V ≤ VDD ≤ 2.5 V, CL = 10 pF — 1.6 — (1) The maximum frequency is defined with the following conditions: (tr+tf) ≤ 2/3 T Skew ≤ 1/20 T 45% < Duty cycle < 55% (2) The fall and rise times are defined between 90% and 10% and between 10% and 90% of the output waveform, respectively. (3) Value guaranteed by characterization, not 100% tested in production. (4) The data is for reference only, and the specific values are related to PCB Layout. 4.13. 14-bit ADC characteristics Table 4-32. 14-bit ADC characteristics Symbol Parameter Conditions Min Typ Max Unit VDDA(1) Operating voltage — 1.8 — 3.6 V VREFP(2)(3) Positive Reference Voltage VDDA ≥ 2.4 V 2.4 — VDDA V VDDA < 2.4 V 1.8 — VDDA V VREFN(2) Negative Reference Voltage — VSSA V fADC(1) ADC clock 2.7 V ≤ VDDA ≤ 3.6 V 2.7 V ≤ VREFP ≤ VDDA 0.1 — 72 MHz 2.4 V ≤ VDDA ≤ 2.7 V 2.4 V ≤ VREFP ≤ VDDA 0.1 — 54 MHz 1.8 V ≤ VDDA ≤ 2.4 V 1.8 V ≤ VREFP ≤ VDDA 0.1 — 36 MHz fS(1) Sampling rate Resolution = 14 bits 2.7 V ≤ VDDA ≤ 3.6 V 2.7 V ≤ VREFP ≤VDDA fADC = 72 MHz SMP = 3.5 — — 4 MSPS 2.4 V ≤ VDDA ≤ 2.7 V 2.4 V ≤ VREFP ≤ VDDA fADC = 54 MHz SMP = 3.5 — — 3 1.8 V ≤ VDDA ≤ 2.4 V 1.8 V ≤ VREFP ≤ VDDA fADC = 36 MHz SMP = 3.5 — — 2 Resolution = 12 bits 2.7 V ≤ VDDA ≤ 3.6 V 2.7 V ≤ VREFP ≤ VDDA fADC = 72 MHz SMP = 3.5 — — 4.5 2.4 V ≤ VDDA ≤ 2.7 V 2.4 V ≤ VREFP ≤ VDDA fADC = 54 MHz SMP = 3.5 — — 3.37 |
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