GD32H757ZMT7 datasheet(6/151 Pages) GIGADEVICE

6 / 151 page

GD32H757xx Datasheet

List of Figures

Figure 2-1. GD32H757xx block diagram ..................................................................................................

Figure 2-2. GD32H757Vx BGA100 pinouts ..............................................................................................

Figure 2-3. GD32H757Zx LQFP144 pinouts ............................................................................................

Figure 2-4. GD32H757Vx LQFP100 pinouts ............................................................................................

Figure 2-5. GD32H757xx clock tree..........................................................................................................

Figure 4-1.

Bypass Mode Power-up and Power-down Timing Diagram (1)(2)(3) ..................................... 86

Figure 4-2. Recommended power supply decoupling capacitors(1)(2)(3) ...............................................

Figure 4-3. Recommended PDR_ON pin circuit(1) ..................................................................................

Figure 4-4. Recommended external OSCIN and OSCOUT pins circuit for crystal .............................

Figure 4-5. Recommended external OSCIN and OSCOUT pins circuit for oscillator .........................

Figure 4-6. Recommended external NRST pin circuit..........................................................................

104

Figure 4-7. I2C bus timing diagram........................................................................................................

123

Figure 4-8. SPI timing diagram - master mode .....................................................................................

124

Figure 4-9. SPI timing diagram - slave mode........................................................................................

124

Figure 4-10. OSPI timing diagram - SDR mode ....................................................................................

126

Figure 4-11. OSPI timing diagram - DTR mode.....................................................................................

126

Figure 4-12. I2S timing diagram - master mode ...................................................................................

129

Figure 4-13. I2S timing diagram - slave mode ......................................................................................

129

Figure 4-14. USBFS timings:

definition of data signal rise and fall time ........................................... 132

Figure 5-1. LQFP144 package outline ...................................................................................................

139

Figure 5-2. LQFP144 recommended footprint ......................................................................................

140

Figure 5-3. BGA100 package outline .....................................................................................................

141

Figure 5-4. BGA100 recommended footprint ........................................................................................

142

Figure 5-5. LQFP100 package outline ...................................................................................................

143

Figure 5-6. LQFP100 recommended footprint ......................................................................................

144

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