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GD32H757ZMT7 Folha de dados(PDF) 92 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD32H757ZMT7 Folha de dados(HTML) 92 Page - GigaDevice Semiconductor (Beijing) Inc. |
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92 / 151 page ![]() GD32H757xx Datasheet 91 Symbol Parameter Conditions Typ LDO regulator ON Max Unit VDD off, VDDA off, VBAT = 3 V, Backup SRAM off, RTC and LXTAL off 0.3 — μA VDD off, VDDA off, VBAT = 3.6 V, Backup SRAM on, RTC and LXTAL off 79.4 — μA VDD off, VDDA off, VBAT = 3.3 V, Backup SRAM on, RTC and LXTAL off 77.1 — μA VDD off, VDDA off, VBAT = 3 V, Backup SRAM on, RTC and LXTAL off 76.3 — μA VDD off, VDDA off, VBAT = 3.6 V, Backup SRAM off, RTC and LXTAL on 3.9 — μA VDD off, VDDA off, VBAT = 3.3 V, Backup SRAM off, RTC and LXTAL on 1.1 — μA VDD off, VDDA off, VBAT = 3 V, Backup SRAM off, RTC and LXTAL on 0.3 — μA VDD off, VDDA off, VBAT = 3.6 V, Backup SRAM on, RTC and LXTAL on 79.5 — μA VDD off, VDDA off, VBAT = 3.3 V, Backup SRAM on, RTC and LXTAL on 77.1 — μA VDD off, VDDA off, VBAT = 3 V, Backup SRAM on, RTC and LXTAL on 76.2 — μA (1) Value guaranteed by characterization, not 100% tested in production. (2) Unless otherwise specified, all values given for TJ = 25 °C and test result is mean value. (3) When analog peripheral blocks such as ADCs, DACs, HXTAL, LXTALor IRC32K are ON, an additional power consumption should be considered. (4) During power consumption test, GPIO needs to be configure as Analog Input mode. 4.4. EMC characteristics System level ESD (Electrostatic discharge, according to IEC 61000-4-2) and EFT (Electrical Fast Transient/burst, according to IEC 61000-4-4) testing result is given in the Table 4-9. System level ESD and EFT characteristics(1). System level ESD is for end-customer operation, it includes ESD field events on system level occur in an unprotected area (outside EPA). System level ESD protection necessary to satisfy higher ESD levels. |
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