GD32H757ZMT7 datasheet(82/151 Pages) GIGADEVICE

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GD32H757xx Datasheet



Granularity is 4096 bytes in RTDEC programmed areas.



Every area can be configured the independent 128-bits key, 16-bits area firmware

version, and 64-bits application-defined nonce.



Confidentiality and

completeness protection for encryption keys.

–

128-bits key registers are write-only, with software locking mechanism.

–

bits CRC is calculated automatically by hardware, and it’s used as the public key

information.



The real-time decryption when OSPI memory-mapped read operations.

–

Use of AES-128 in CTR mode.

–

Support key stream FIFO with depth 4.

–

Support various read size.

–

Decryption / encryption with physical address of the reads.



Support for GD32 OSPI pre-fetching mechanism.

The real-time decryption (RTDEC) allows to decrypt in real-time according to information of

the read request address. RTDEC can configure four independent and different encrypted

areas. And each area has the option of execute-only or execute-never enforcement to choose.

For real-time performance, RTDEC uses the counter (CTR) mode of AES-128. Since RTDEC

using AES in counter mode, the whole area has to be re-encrypted with an updated

cryptographic context (key or initialization vector) when the data or code of one encrypted

area is changed. This feature makes RTDEC only suitable for decrypting read-only content,

like that stored in external flash.

3.44.

Filter arithmetic accelerator (FAC)

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Fixed or float multiplier and accumulator.

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256 x 32-bit local memory.

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16-bit fixed-point or 32-bit float point input and output.

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Up to three buffers, two input buffers and one output buffer.

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Buffer can be circular.

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FIR and IIR can be realized.

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Vector functions support convolution, Dot product, correlation functions.

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Data can be read and written through DMA.

The filter arithmetic accelerator unit consist of multiplier, accumulator and address generation

logic, so as to index vector elements stored in local memory. Circular buffering is valid for

both input and output, which allows to realize finite impulse response (FIR) filters and infinite

impulse response (IIR) filters. The unit support CPU to be free from frequent or lengthy filtering

operations, compared with software implementation, it can accelerate calculations and the

processing speed of time critical tasks.

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