GD32H757ZMT7 datasheet(104/151 Pages) GIGADEVICE

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GD32H757xx Datasheet

103

Table 4-25. PLLUSBHS0/1 characteristics(3)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPLLIN(1)

PLL input clock frequency

—

MHz

fPLLOUT(1)

PLL output clock frequency

—

480

—

MHz

fVCO(1)

PLL VCO output clock

frequency

—

480

—

MHz

tLOCK(1)

PLL lock time

—

100

150

μs

IDDA(2)

Current consumption on

VDDA

—

1.7

—

JitterPLL

Cycle to cycle Jitter(rms)

System clock

—

Cycle to cycle Jitter

（peak to peak）

—

400

—

(1)

Value guaranteed by characterization, not 100% tested in production.

(2)

Value guaranteed by design, not 100% tested in production.

(3)

Value given with main PLL running.

4.10.

Memory characteristics

Table 4-26. Flash memory characteristics

Symbol

Parameter

Conditions

Min(1) Typ(1)

Max(2)

Unit

PECYC

Number of guaranteed

program /erase cycles

before failure (Endurance)

—

100

—

kcycles

tRET

Data retention time

—

years

tPROG

Word programming time

TA = -40°C ~ +105 °C

—

tERASE4kB

Sector(4kB) erase time

TA = -40°C ~ +105 °C

—

100

—

tMERASE(1MB)

Mass erase time

TA = -40°C ~ +105 °C

—

tMERASE(2MB)

Mass erase time

TA = -40°C ~ +105 °C

—

tMERASE(3840kB)

Mass erase time

TA = -40°C ~ +105 °C

—

(1)

Value guaranteed by characterization, not 100% tested in production.

(2)

Value guaranteed by design, not 100% tested in production.

4.11.

NRST pin characteristics

Table 4-27. NRST pin characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL(NRST)(2)

NRST Input low level voltage

VDD = VDDA = 1.71 V

-0.3

—

0.3 VDD

VIH(NRST)(2)

NRST Input high level voltage

0.7 VDD —

VDD + 0.3

Vhyst(1)

Schmidt trigger Voltage hysteresis

—

300

—

VIL(NRST)(2)

NRST Input low level voltage

VDD = VDDA = 3.3 V

-0.3

—

0.3 VDD

VIH(NRST)(2)

NRST Input high level voltage

0.7 VDD —

VDD + 0.3

Vhyst(1)

Schmidt trigger Voltage hysteresis

—

310

—

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