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ADIN1300BCPZ-R7 Folha de dados(PDF) 6 Page - Analog Devices |
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ADIN1300BCPZ-R7 Folha de dados(HTML) 6 Page - Analog Devices |
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6 / 79 page ![]() ADIN1300 Data Sheet Rev. 0 | Page 6 of 79 TIMING CHARACTERISTICS Power-Up Timing Table 2. Power-Up Timing Parameter Description Min Typ Max Unit tRAMP Power supply ramp time 40 ms t1 Minimum time interval to internal power good1 6.8 ms t2 XTAL_I crystal settling time 1.5 2 ms XTAL_I external clock settling time 20 μs t3 Hardware configuration latch time 64 μs t4 Management interface active 5 ms 1 The minimum time interval is referenced to the last supply to reach its rising threshold. There is no specific power supply sequencing required. DVDD_0P9 XTAL_I RESET_N PIN MDC HARDWARE CONFIGURATION PINS CONFIGURATION LATCHED DUAL FUNCTION PINS ENABLED AS OUTPUTS AVDD_3P3 FUNCTIONAL STATE POWER GOOD RESET RELEASED CLOCKSTABILISING HARDWARE CONFIG LATCHED MANAGEMENT INTERFACE ACTIVE VDDIO SUPPLY RAMP POWER OFF t3 tRAMP tRAMP tRAMP t4 t2 t1 Figure 2. Power-Up Timing Hardware Reset Timing Table 3. Hardware Reset Timing Parameter Description Min Typ Max Unit t1 RESET_N low time 10 μs t2 XTAL_I crystal settling time 1.5 ms XTAL_I external clock settling time 0 ms t3 Hardware configuration latch time 64 μs t4 Management interface active 5 ms |
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