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ADIN1300BCPZ-R7 Folha de dados(PDF) 38 Page - Analog Devices |
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ADIN1300BCPZ-R7 Folha de dados(HTML) 38 Page - Analog Devices |
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38 / 79 page ![]() ADIN1300 Data Sheet Rev. 0 | Page 38 of 79 • VDDIO enables the MDIO and MAC interface voltage supply to be configured independently of the other circuitry on the ADIN1300. There are no power supply sequencing requirements around the order of power being applied to the device. See the Power-Up Timing section for more details. The following simplified system level power solutions show three recommended arrangements for powering the ADIN1300 PHY and companion two-port switch (note that depending on the choice of two-port switch, there may be differing power supply requirements to what is shown). 3.3V ADP51331 DUAL, 800mA BUCK REGULATOR 1ALTERNATIVES ARE ADP5023 OR ADP5024 (WITH LDO CHANNEL). VOUT1 VOUT2 ADIN1300 10Mbps, 100Mbps, 1Gbps ETHERNET PHY 1.8V DVDD_0P9 VDDIO AVDD_3P3 ADIN1300 10Mbps, 100Mbps, 1Gbps ETHERNET PHY DVDD_0P9 VDDIO AVDD_3P3 0.9V TWO-PORT SWITCH 10Mbps, 100Mbps, 1Gbps PORT 1 PORT 2 Figure 35. Recommended Power Solution for 3.3 V with RGMI Operating at VDDIO = 1.8 V 3.3V 24V ADP51331 DUAL, 800mA BUCK REGULATOR 1ALTERNATIVES ARE ADP5023 OR ADP5024 (WITH LDO CHANNEL). 2ALTERNATIVES ARE ADP2443, 3A CAPABLE. VOUT1 VOUT2 ADIN1300 10Mbps, 100Mbps, 1Gbps ETHERNET PHY 1.8V DVDD_0P9 VDDIO AVDD_3P3 ADIN1300 10Mbps, 100Mbps, 1Gbps ETHERNET PHY DVDD_0P9 VDDIO AVDD_3P3 0.9V TWO-PORT SWITCH 10Mbps, 100Mbps, 1Gbps PORT 1 PORT 2 ADP24412 36V, 1A BUCK REGULATOR Figure 36. Recommended Power Solution with 24 V System Power, where RGMI is Operating at VDDIO = 1.8 V ADP5135 TRIPLE, 1800mA BUCK REGULATOR VOUT2 VOUT1 VOUT3 ADIN1300 10Mbps, 100Mbps, 1Gbps ETHERNET PHY 1.8V DVDD_0P9 VDDIO AVDD_3P3 ADIN1300 10Mbps, 100Mbps, 1Gbps ETHERNET PHY DVDD_0P9 VDDIO AVDD_3P3 0.9V TWO-PORT SWITCH 10Mbps, 100Mbps, 1Gbps PORT 1 PORT 2 5V SYSTEM SUPPLY Figure 37. Recommended Power Solution using ADP5135 Triple Buck Regulator to Supply all Three Voltage Rails SUPPLY DECOUPLING It is recommended to decouple each of the AVDD_3P3, VDDIO, and DVDD_0P9 supply pins with 0.1 μF in parallel with 0.01 μF capacitors to ground. Place decoupling capacitors as close to the relevant pins as possible and ensure that the capacitor ground is routed directly into the plane. ADIN1300 VDDIO 3.3V/ 2.5V/ 1.8V AVDD_3P3 3.3V AVDD_3P3 DVDD_0P9 DVDD_0P9 0.01µF 0.1µF VDDIO 0.01µF 0.1µF VDDIO 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF AVDD_3P3 0.01µF 0.1µF 0.01µF 0.1µF 0.01µF 0.1µF 0.9V Figure 38. Supply Decoupling Overview |
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