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ADIN1300BCPZ-R7 Folha de dados(PDF) 30 Page - Analog Devices

Nome de Peças ADIN1300BCPZ-R7
Descrição Electrónicos  Robust, Industrial, Low Latency and Low Power 10 Mbps
PDF  79 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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ADIN1300BCPZ-R7 Folha de dados(HTML) 30 Page - Analog Devices

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ADIN1300
Data Sheet
Rev. 0 | Page 30 of 79
ON-CHIP DIAGNOSTICS
LOOPBACK MODES
The PHY core provides several loopback modes: all digital
loopback, MII loopback, external cable loopback, line driver
loopback, and remote loopback (see Figure 28). These loopback
modes test and verify various functional blocks within the PHY.
The use of frame generators and frame checkers allow completely
self contained in-circuit testing of the digital and analog data
paths within the PHY core.
All Digital Loopback
The default loopback mode is all digital loopback mode. This
loops the data within the PHY at the analog/digital boundary to
check for proper operation of the PHY, but does not require the
external analog components, connections, or analog supplies to
be accurate. In all digital loopback mode, it is possible to also
transmit to the MDI pins, which can be useful for transmit
testing. By default, the LB_ALL_DIG_SEL bit (PHY_CTRL_
STATUS_1 register, Address 0x0013) is set, which selects all
digital loopback mode and the LB_TX_SUP bit (Bit 6 within the
PHY_CTRL_STATUS_1 register) is also set, which suppresses the
transmission of the signal to the MDI pins. Setting the
PHY_CTRL_STATUS_1 register to a value of 0x1001 selects
digital loopback with transmission to the MDI pins. The
loopback bit (MII_CONTROL register, Address 0x0000, Bit 14)
also needs to be set to enable all digital loopback mode.
External Cable Loopback
External cable loopback verifies the whole analog and digital
path, including the external components and cable. This requires
that Pair 0 and Pair 1, and Pair 2 and Pair 3 are shorted together
to provide an analog loopback at the end of the cable. The signal
processing is adjusted so that the transmitted signal is not
cancelled. Setting the LB_EXT_EN bit (PHY_CTRL_STATUS_1
register, Address 0x0013) enables external cable loopback.
Line Driver Loopback
For line driver loopback, leave the MDI pins open-circuit,
thereby transmitting into an unterminated connector/cable. The
PHY can then operate by receiving the reflection from its own
transmission. This provides similar capabilities to the external
cable loopback without the need to create any wire shorts by
unplugging the cable. Setting the LB_LD_SEL bit
(PHY_CTRL_STATUS_1 register, Address 0x0013) selects line
driver loopback. The loopback bit (MII_CONTROL register,
Address 0x0000, Bit 14) also needs to be set to enable line driver
loopback.
Remote Loopback
Remote loopback requires a link up with a remote PHY and to
loop the data received from the remote PHY back to the remote
PHY. This linking allows a remote PHY to verify a complete
link by ensuring that the PHY receives the proper data. Setting
the PHY_CTRL_STATUS_1 register to a value of 0x0241 selects
remote loopback where the data received by the PHY is also
sent to the MAC. Setting the LB_TX_SUP bit within the
PHY_CTRL_STATUS register, which sets the register value to
0x0341, selects remote loopback, where the data received by the
PHY is not sent to the MAC. For this type of loopback, do not
set the loopback bit (MII_CONTROL register, Address 0x0000,
Bit 14).
MAC
RJ45
FRAME
CHECKER
FRAME
GENERATOR
ALL
DIGITAL
LOOPBACK
EXTERNAL
CABLE
LOOPBACK
TRANSMITTER
SUPRESSION
RECEIVER
SUPPRESSION
REMOTE
LOOPBACK
LINE
DRIVER
LOOPBACK
MAC
INTERFACE
PHY
AFE
PHY
DIGITAL
Figure 28. ADIN1300 Loopback Modes



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