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MC9328MXL Folha de dados(PDF) 52 Page - Freescale Semiconductor, Inc |
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MC9328MXL Folha de dados(HTML) 52 Page - Freescale Semiconductor, Inc |
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52 / 84 page ![]() MC9328MXL Advance Information, Rev. 5 52 Freescale Semiconductor Specifications Figure 40. Timing Diagrams at Data Transfer Mode Figure 41 on page 53 shows basic read operation timing. In a read operation, the sequence starts with a single block read command (which specifies the start address in the argument field). The response is sent on the SD_CMD lines as usual. Data transmission from the card starts after the access time delay NAC, beginning from the last bit of the read command. If the system is in multiple block read mode, the card sends a continuous flow of data blocks with distance NAC until the card sees a stop transmission command. The data stops two clock cycles after the end bit of the stop command. Timing of command sequences (all modes) Timing response end to next CMD start (data transfer mode) Command response timing (data transfer mode) Host Command Response NCR cycles CMD Content S T E Z Z P P S T Content CRC E Z Z ****** CRC Z Response Host Command NRC cycles CMD Content S T E Z Z S T Content CRC E Z Z ****** CRC Z Host Command Host Command NCC cycles CMD Content S T E Z Z S T Content CRC E Z Z ****** CRC Z |
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