DS3134 datasheet(53/203 Pages) DALLAS

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DS3134

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Each port contains a Layer One State Machine, which connects directly to the Slow HDLC Engine. The

Layer One State Machine prepares the raw incoming data for the Slow HDLC Engine and grooms the

outgoing data from the Slow HDLC Engine. The Layer One State Machine performs a number of tasks,

which include:

- Assigning the HDLC channel number to the incoming & outgoing data

- Channelized Local and Network loopbacks

- Channelized selection of 64 kbps, 56 kbps, or no data

- Channelized transmits DS0 channel fill of all ones

Routing data to and from the BERT function

Routing data to the V.54 loop pattern detector.

The DS3134 has a set of three registers per DS0 channel for each port, which determine how each DS0

channel will be configured. These three registers are defined in Section 5.3. If the Fast (52 Mbps) HDLC

Engine is enabled on Port 0, then HDLC Channel 1 is assigned to it and likewise HDLC Channel 2 will

be assigned to the Fast HDLC Engine on Port 2 if it is enabled.

The DS3134 contains an onboard full-featured Bit Error Rate Tester (BERT) function, which is capable

of generating and detecting both pseudorandom and repeating serial bit patterns.

The BERT function is

a shared resource among the 16 ports on the DS3134 and it can only be assigned to one port at a time.

The BERT function can be used in both channelized and unchannelized applications and at speeds up to

52 MHz. In channelized applications, data can be routed to and from any combination of DS0 channels

that are being used on the port. The details on the BERT function are covered in Section 5.5.

The Layer 1 Block also contains a V.54 detector. Each of the 16 ports within the DS3134 contains a V.54

loop pattern detector on the receive side. The device can search for the V.54 loop up and down patterns

in both channelized and unchannelized applications at speeds up to 10 MHz. In channelized applications,

the device can be configured to search for the patterns in any combination of DS0 channels. Section 5.4

describes all of the details on the V.54 detector.

DS3134 Folha de dados(PDF) 53 Page - Dallas Semiconductor