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DS3134 Folha de dados(PDF) 24 Page - Dallas Semiconductor

Nome de Peças DS3134
Descrição Electrónicos  Chateau Channelized T1 And E1 And HDLC Controller
PDF  203 Pages
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Fabricante Electrônico  DALLAS [Dallas Semiconductor]
Página de início  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS3134 Folha de dados(HTML) 24 Page - Dallas Semiconductor

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2.3 LOCAL BUS SIGNAL DESCRIPTION
Signal Name:
LMS
Signal Description:
Local Bus Mode Select
Signal Type:
Input
This signal should be tied low when the device is to be operated either with no Local Bus access or if the
Local Bus will be used to act as a bridge from the PCI bus. This signal should be tied high if the Local
Bus is to be used by an external host to configure the device.
0 = Local Bus is in the PCI Bridge Mode (master)
1 = Local Bus is in the Configuration Mode (slave)
Signal Name:
LIM
Signal Description:
Local Bus Intel/Motorola Bus Select
Signal Type:
Input
The signal determines whether the Local Bus will operate in the Intel Mode (LIM = 0) or the Motorola
Mode (LIM = 1). The signal names in parenthesis are operational when the device is in the Motorola
Mode.
0 = Local Bus is in the Intel Mode
1 = Local Bus is in the Motorola Mode
Signal Name:
LD0 to LD15
Signal Description:
Local Bus Non-Multiplexed Data Bus
Signal Type:
Input / Output (tri-state capable)
In PCI Bridge Mode (LMS = 0), data from/to the PCI bus can be transferred to/from these signals. When
writing data to the Local Bus, these signals will be outputs and updated on the rising edge of LCLK.
When reading data from the Local Bus, these signals will be inputs, which will be sampled on the rising
edge of LCLK. Depending on the assertion of the PCI Byte Enables (PCBE0 to PCBE3) and the Local
Bus Width (LBW) control bit in the Local Bus Bridge Mode Control Register (LBBMC), this data bus
will utilize all 16-bits (LD[15:0]) or just the lower 8-bits (LD[7:0]) or the upper 8-bits (LD[15:8]). If the
upper LD bits (LD[15:8]) are used, then the Local Bus High Enable signal (LBHE*) will be asserted
during the bus transaction. If the Local Bus is not currently involved in a bus transaction, then all 16
signals will be tri-stated. In the Configuration Mode (LMS = 1), the external host will configure the
device and obtain real time status information about the device via these signals. When reading data from
the Local Bus, these signals will be outputs that are updated on the rising edge of LCLK. When writing
data to the Local Bus, these signals will become inputs which will be sampled on the rising edge of
LCLK. In the Configuration Mode, only the 16-bit bus width is allowed (i.e. byte addressing is not
available).



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