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DS3134 Folha de dados(PDF) 74 Page - Dallas Semiconductor

Nome de Peças DS3134
Descrição Electrónicos  Chateau Channelized T1 And E1 And HDLC Controller
PDF  203 Pages
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Fabricante Electrônico  DALLAS [Dallas Semiconductor]
Página de início  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS3134 Folha de dados(HTML) 74 Page - Dallas Semiconductor

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Bit 4 / Single Bit Error Insert (SBE). A low to high transition will create a single bit error. Must be
cleared and set again for a subsequent bit error to be inserted.
Bit 5 / Error Insert Bit 0 (EIB0).
Bit 6 / Error Insert Bit 1 (EIB1).
Bit 7 / Error Insert Bit 2 (EIB2).
Will automatically insert bit errors at the prescribed rate into the generated data pattern. Useful for
verifying error detection operation.
EIB
2
EIB
1
EIB
0
Error Rate Inserted
0
0
0
no errors automatically inserted
00110E-1
01010E-2
01110E-3
10010E-4
10110E-5
11010E-6
11110E-7
Bits 8 to 15 / Alternating Word Count Rate. When the BERT is programmed in the alternating word
mode, the words will repeat for the count loaded into this register then flip to the other word and again
repeat for the number of times loaded into this register. The valid count range is from 05h to FFh.
Register Name:
BERTRP0
Register Description: BERT Repetitive Pattern Set 0
Register Address:
0508h
Register Name:
BERTRP1
Register Description: BERT Repetitive Pattern Set 1
Register Address:
050Ch
BERTRP0: BERT Repetitive Pattern Set 0 (lower word)
76
5432
10
BERT Repetitive Pattern Set (lower byte)
15
14
13
12
11
10
9
8
BERT Repetitive Pattern Set
Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.



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