DS3134 datasheet(52/203 Pages) DALLAS

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DS3134

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SECTION 5: LAYER ONE

5.1 GENERAL DESCRIPTION

The Layer One Block is shown in Figure 5.1A. Each of the 16 Layer One ports on the DS3134 can be

configured to support either a channelized application or an unchannelized application. Users can mix the

applications on the ports as needed. Some or all of the ports can be channelized while the others can be

configured as unchannelized.

A channelized application is defined as one that requires a 8 kHz

synchronization pulse to subdivide the serial data stream into a set of 8-bit DS0 channels (also called

timeslots) which are Time Division Multiplexed (TDM) one after another.

Ports running a channelized

application require an 8 kHz pulse at the RS and TS signals. An unchannelized application is defined as a

synchronous clock and data interface. No synchronization pulse is required and the RS and TS signals are

forced low in this application. Section 14 contains examples of some various configurations.

In channelized applications, the Layer One ports can be configured to operate in one of four modes as

shown in Table 5.1A below. Each port is capable of handling one, two, or four T1/E1 data streams.

When more than one T1/E1 data stream is applied to the port, the individual T1/E1 data streams must be

TDM into a single data stream at either a 4.096 MHz or 8.192 MHz data rate. Since the DS3134 can map

any HDLC channel to any DS0 channel, it can support any form (byte interleaved, frame interleaved, etc.)

of TDM that the application may require. On a DS0 by DS0 basis, the DS3134 can be configured to

process all 8 bits (64 kbps), the seven most significant bits (56 kbps), or no data.

CHANNELIZED PORT MODES Table 5.1A

Mode

Description

T1 (1.544 MHz)

N x 64 kbps or N x 56 kbps; where N = 1 to 24 (one T1 data stream)

E1 (2.048 MHz)

N x 64 kbps or N x 56 kbps; where N = 1 to 32 (one T1 or E1 data stream)

4.096 MHz

N x 64 kbps or N x 56 kbps; where N = 1 to 64 (two T1 or E1 data streams)

8.192 MHz

N x 64 kbps or N x 56 kbps; where N = 1 to 128. (four T1 or E1 data streams)

Each port in the Layer One Block is connected to a Slow HDLC Engine. The Slow HDLC Engine is

capable of handling channelized applications at speeds up to 8.192 Mbps and unchannelized applications

at speeds of up to 10 Mbps. Ports 0 and 1 have the added capability of Fast HDLC Engines that are

capable of only handling unchannelized applications but at speeds of up to 52 MHz.

Each port has an associated Receive Port Control Register (RP[n]CR where n = 0 to 15) and a Transmit

Port Control Register (TP[n]CR where n = 0 to 15). These control registers are defined in detail in

Section 5.2 and they control all of the circuitry in the Layer One Block with the exception of the Layer

One State Machine which is shown in the center of the Block Diagram in Figure 5.1A.

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