82374EB datasheet(65/208 Pages) INTEL

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82374EB82374SB

3213 DMALPRDMA LOW PAGE REFRESH REGISTER

08Fh

Default Value

xxh

Attribute

ReadWrite

Size

8 Bits

The contents of this register are driven on the address byte 2 (LA 2316

) during Refresh cycles

Bit

Description

DMA LOW PAGE REFRESH

The contents of the bits are driven on to the address bus(LA 2316 )

during refresh

3214 DMAMHPGDMA MEMORY HIGH PAGE REGISTER DMA MEMORY BASE HIGH PAGE

0487hDMA Channel 0

0483hDMA Channel 1

0481hDMA Channel 2

0482hDMA Channel 3

048BhDMA Channel 5

0489hDMA Channel 6

048AhDMA Channel 7

Default Value

00h

Attribute

ReadWrite

Size

8 Bits per channel

Each channel has an 8-bit High Page register The DMA memory High Page register contains the eight most-

significant bits of the 32-bit address It works in conjunction with the DMA controller’s Low Page register and

Current Address register to define the complete (32-bit) address for the DMA channels and corresponds to the

‘‘Current Address’’ register for each channel This 8-bit register is read or written directly by the processor or

bus master It may also be re-initialized by an autoinitialize back to its original value Autoinitialize takes place

only after a TC or EOP

This register is reset to 00h during the programming of both the low page register and the Current Address

grammed then its value will be zero In this case the DMA channel will operate the same as an 82C37 (from

an addressing standpoint) This is the address compatibility mode

If the high 8 bits of the address are programmed after the other addresses then the channel will modify its

operation to increment (or decrement) the entire 32-bit address This is unlike the 82C37 ‘‘Page’’ register in

the original PCs which could only increment to a 64K boundary (for 8-bit channels) or 128K (for 16-bit chan-

nels) This is extended address mode In this mode the ISA bus controller will generate the signals MEMR

and MEMW

only for addresses below 16 MBytes

Each channel has a Base High Page Address register located at the same port address as the corresponding

Current High Page Address register These registers store the original value of their associated Current

registers During autoinitialize these values are used to restore the Current registers to their original values

The 8 bit Base High Page registers are written simultaneously with their corresponding Current register by the

microprocessor The Base registers cannot be read by any external agents

During Scatter-Gather these registers store the 8 bits from the highest byte of the current memory address

During a Scatter-Gather transfer the DMA will load a reserve buffer into the base memory address register

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