HD6433636SW datasheet(239/418 Pages) RENESAS

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Receive Data Register (RDR)

Bit

76543210

RDR7

RDR6

RDR5

RDR4

RDR3

RDR2

RDR1

RDR0

Initial value

00000000

Read/Write

RRRRRRRR

The receive data register (RDR) is an 8-bit register for storing received serial data.

Each time a byte of data is received, the received data is transferred from the receive shift register

(RSR) to RDR, completing a receive operation. Thereafter RSR again becomes ready to receive

new data. RSR and RDR form a double buffer mechanism that allows data to be received

continuously.

RDR is exclusively for receiving data and cannot be written by the CPU.

RDR is initialized to H'00 upon reset or in standby mode, watch mode, subactive mode, or

subsleep mode.

Transmit Shift Register (TSR)

Bit

76543210

Read/Write

————————

The transmit shift register (TSR) is for transmitting serial data.

Transmit data is first transferred from the transmit data register (TDR) to TSR, then is transmitted

from pin TXD, starting from the LSB (bit 0).

After one byte of data has been sent, the next byte is automatically transferred from TDR to TSR,

and the next transmission begins. If no data has been written to TDR (1 is set in TDRE), there is

no data transfer from TDR to TSR.

TSR cannot be read or written directly by the CPU.

HD6433636SW Folha de dados(PDF) 239 Page - Renesas Technology Corp