HD6433636SW datasheet(119/418 Pages) RENESAS

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105

Time for Direct Transfer from Subactive Mode to Active (High-Speed) Mode: When a

SLEEP instruction is executed in subactive mode while the SSBY bit in SYSCR1 is set to 1,

the LSON bit in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is cleared to 0, the

DTON bit in SYSCR2 is set to 1, and bit TMA3 in TMA is set to 1, a transition is made

directly to active (high-speed) mode. In this case, the time from execution of the SLEEP

instruction to the end of interrupt exception handling (the direct transfer time) is given by

equation (3) below:

Direct transfer time ={ (Number of SLEEP instruction execution states) +

(number of internal processing states) }

× (t

subcyc before transition) +

{ (standby time set in STS2 to STS0) +

(number of interrupt exception handling execution states) }

cyc after transition) ...................................................................... (3)

Example: H8/3637S Series direct transfer time = (2 + 1)

× 8t

w + (8192 + 14) × 2tosc= 24tw +

16412t

osc

(When ø

w/8 CPU operating clock and 8192-state standby time are selected)

Legend:

osc: OSC clock cycle time

w: Watch clock cycle time

cyc: System clock (ø) cycle time

subcyc: Subclock (øSUB) cycle time

Time for Direct Transfer from Subactive Mode to Active (Medium-Speed) Mode: When

a SLEEP instruction is executed in subactive mode while the SSBY bit in SYSCR1 is set to 1,

the LSON bit in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is set to 1, the DTON bit

in SYSCR2 is set to 1, and bit TMA3 in TMA is set to 1, a transition is made directly to active

(medium-speed) mode. In this case, the time from execution of the SLEEP instruction to the

end of interrupt exception handling (the direct transfer time) is given by equation (4) below:

Direct transfer time ={ (Number of SLEEP instruction execution states) +

(number of internal processing states) }

× (t

subcyc before transition) +

{ (standby time set in STS2 to STS0) +

(number of interrupt exception handling execution states) }

cyc after transition) ...................................................................... (4)

Example: H8/3637S Series direct transfer time = (2 + 1)

× 8t

w + (8192 + 14) × 16tosc= 24tw +

13129t

osc

(When ø

w/8 CPU operating clock and 8192-state standby time are selected)

Legend:

osc: OSC clock cycle time

w: Watch clock cycle time

cyc: System clock (ø) cycle time

subcyc: Subclock (øSUB) cycle time

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