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HD6433636SW Folha de dados(PDF) 276 Page - Renesas Technology Corp

Nome de Peças HD6433636SW
Descrição Electrónicos  8-Bit Microcomputer
PDF  418 Pages
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6433636SW Folha de dados(HTML) 276 Page - Renesas Technology Corp

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Notes: 1. To switch from transmitting to simultaneous transmitting and receiving, first confirm
that TDRE and TEND are both set to 1 and that SCI3 has finished transmitting. Next
clear TE to 0. Then set both TE and RE to 1.
2. To switch from receiving to simultaneous transmitting and receiving, after confirming
that SCI3 has finished receiving, clear RE to 0. Next, after confirming that RDRF and
the error flags (OER FER, PER) are all 0, set both TE and RE to 1.
10.3.6
Multiprocessor Communication Function
The multiprocessor communication function enables several processors to share a single serial
communication line. The processors communicate in asynchronous mode using a format with an
additional multiprocessor bit (multiprocessor format).
In multiprocessor communication, each receiving processor is addressed by an ID code. A serial
communication cycle consists of two cycles: an ID-sending cycle that identifies the receiving
processor, and a data-sending cycle in which communication data is sent to the specified receiving
processor. The multiprocessor bit is used to distinguish between the ID-sending cycle and the
data-sending cycle. The multiprocessor bit is 1 in an ID-sending cycle, and 0 in a data-sending
cycle.
The transmitting processor starts by sending the ID of the receiving processor with which it wants
to communicate as data with the multiprocessor bit set to 1. Next the transmitting processor sends
transmit data with the multiprocessor bit cleared to 0. When a receiving processor receives data
with the multiprocessor bit set to 1, it compares the data with its own ID. If the data matches its
ID, the receiving processor continues to receive incoming data. If the data does not match its ID,
the receiving processor skips further incoming data until it again receives data with the
multiprocessor bit set to 1. Multiple processors can send and receive data in this way.
Figure 10.19 shows an example of communication among different processors using a
multiprocessor format.



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