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HD6433636SW Folha de dados(PDF) 220 Page - Renesas Technology Corp |
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HD6433636SW Folha de dados(HTML) 220 Page - Renesas Technology Corp |
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220 / 418 page ![]() 206 9.5.5 Timer Y Operating Modes Timer Y operating modes are shown in table 9.16. Table 9.16 Timer Y Operating Modes Operation Mode Reset Active Sleep Watch Sub- active Sub- sleep Standby TCY Interval Reset Functions Functions Halted Halted Halted Halted Auto- reload Reset Functions Functions Halted Halted Halted Halted TMY Reset Functions Retained Retained Retained Retained Retained 9.6 Watchdog Timer 9.6.1 Overview The watchdog timer is equipped with an 8-bit counter that is incremented by an input clock. An internal chip reset can be executed if the counter overflows because it is not updated normally due to a system crash, etc. Features: Features of the watchdog timer are given below. • Incremented by a ø/8192 internal clock • Reset signal generated on counter overflow An overflow period of 1 to 256 times 8192/ø can be set. (Approx. 2 ms to 500 ms when ø = 4.19 MHz) |
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