HD6433636SW datasheet(210/418 Pages) RENESAS

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Note on Rewriting Port Mode Registers: When a port mode register setting is modified to

enable or disable the input capture function or input capture noise canceling function, note the

following points.

• Switching the function of the input capture pin

When the function of the input capture pin is switched by modifying port mode register 1

(PMR1) bit 3 (the TMIG bit), an input capture edge may be recognized even though no valid

signal edge has been input. This occurs under the conditions listed in table 9.12.

Table 9.12

False Input Capture Edges Generating by Switching of Input Capture Pin

Function

Input Capture Edge

Conditions

Rising edge recognized

TMIG pin level is high, and TMIG bit is changed from 0 to 1

TMIG pin level is high and NCS bit is changed from 0 to 1, then TMIG

bit is changed from 0 to 1 before noise canceller circuit completes five

samples

Falling edge recognized

TMIG pin level is high, and TMIG bit is changed from 1 to 0

TMIG pin level is low and NCS bit is changed from 0 to 1, then TMIG

bit is changed from 0 to 1 before noise canceller circuit completes five

samples

TMIG pin level is high and NCS bit is changed from 0 to 1, then TMIG

bit is changed from 1 to 0 before noise canceller circuit completes five

samples

Note:

When pin P1

3 is not used for input capture, the input capture signal input to timer G is low.

• Switching the input capture noise canceling function

When modifying port mode register 2 (PMR2) bit 4 (the NCS bit) to enable or disable the input

capture noise canceling function, first clear the TMIG bit to 0. Otherwise an input capture edge

may be recognized even though no valid signal edge has been input. This occurs under the

conditions listed in table 9.13.

Table 9.13

False Input Capture Edges Generating by Switching of Noise Canceling

Function

Input Capture Edge

Conditions

Rising edge recognized

TMIG bit is set to 1 and TMIG pin level changes from low to high, then

NCS bit is changed from 1 to 0 before noise canceller circuit completes

five samples

Falling edge recognized

TMIG bit is set to 1 and TMIG pin level changes from high to low, then

NCS bit is changed from 1 to 0 before noise canceller circuit completes

five samples

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