UCD3138064ARGCR.A datasheet(29/84 Pages) TI2

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SR0_ DPWM

SR1_ DPWM

DTC0

DTC1

DETECT_ BLANK

DETECT_ LEN

DETECT

ADJUST

Thermal Pad

(GND)

CTRL

DTC

OUT

VCC

Thermal Pad

(GND)

CTRL

DTC

OUT

VCC

UCD3138064A

DPWM

module

SR1 DPWM

SR2 DPWM

Decoder

Dead Time

Control

Computation

Engine

DTC0

DTC1

Rising edge

optimization

control

Rising edge

optimization

control

SR1

SR2

UCD7138

UCD3138064A

www.ti.com

SLUSCA5B – DECEMBER 2015 – REVISED JANUARY 2017

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Detailed Description

6.4.3

Synchronous Rectifier Dead Time Optimization Peripheral

The UCD3138064A has an advanced dead time control interface where it can accept UCD7138 output

signals and optimize SR gate driver signals accordingly. The UCD7138 low-side MOSFET driver is a high-

performance driver for secondary-side synchronous rectification (SR) with body diode conduction sensing.

The device is suitable for high power high efficiency isolated converter applications where dead-time

optimization is desired. The UCD7138 gate driver is a companion device to UCD3138064A highly

integrated digital controller for isolated power.

Figure 6-5. Synchronous Rectifier Peripheral use with Synchronous Rectifier Driver

DTC0 and DTC1 are received body diode conduction inputs from UCD7138. SR0_DPWM and

SR1_DPWM are the DPWM waveforms for the SRs. The red and green edges are moving edges

controlled by both the filter output and the DTC interface. In each cycle, right after the falling edge of the

SR DPWM waveform, a body diode conduction time detection window is generated. The detection window

is defined by both DETECT_BLANK and DETECT_LEN registers. During this detection window, a 4-ns

timer capture counts how long the body diode conducts. Then the DPWM turn off edge of the next cycle is

adjusted accordingly.

Figure 6-6. Timing Diagram of the DTC Interface

Figure 6-7 shows how the turn-off edge is adjusted based on the DTC measurement of the previous cycle.

The A_ADJ and B_ADJ registers in DTCMONITOR are signed accumulators; default value is 0.

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