UCD3138064ARGCR.A datasheet(23/84 Pages) TI2

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Error ADC

(Front End)

Filter

Digital

PWM

EAP

EAN

DPWMA

DPWMB

UCD3138064A

www.ti.com

SLUSCA5B – DECEMBER 2015 – REVISED JANUARY 2017

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Detailed Description

Table 6-1. Interrupt Priority Table (continued)

NAME

MODULE COMPONENT OR

DESCRIPTION

PRIORITY

FE0_INT

Front End 0

“Prebias complete”, “Ramp Delay Complete”, “Ramp

Complete”, “Load Step Detected”,

“Over-Voltage Detected”, “EADC saturated”

FE1_INT

Front End 1

“Prebias complete”, “Ramp Delay Complete”, “Ramp

Complete”, “Load Step Detected”,

“Over-Voltage Detected”, “EADC saturated”

FE2_INT

Front End 2

“Prebias complete”, “Ramp Delay Complete”, “Ramp

Complete”, “Load Step Detected”,

“Over-Voltage Detected”, “EADC saturated”

PWM3_INT

16-bit Timer PWM 3

16-bit Timer PWM3 counter overflow or compare interrupt

PWM2_INT

16-bit Timer PWM 2

16-bit Timer PWM2 counter Overflow or compare interrupt

PWM1_INT

16-bit Timer PWM 1

16-bit Timer PWM1 counter overflow or compare interrupt

PWM0_INT

16-bit timer PWM 0

16-bit Timer PWM0 counter overflow or compare interrupt

OVF24_INT

24-bit Timer Control

24-bit Timer counter overflow interrupt

DTC_FLT_INT

DTC Fault Interrupt

DTC module fault interrupt

Reserved for future use

CAPTURE_0_INT

24-bit Timer Control

24-bit Timer capture 0 interrupt

COMP_0_INT

24-bit Timer Control

24-bit Timer compare 0 interrupt

CPCC_RTC_INT

Constant Power Constant Current

or Real Time Clock Output

Mode switched in CPCC module Flag needs to be read for

details. RTC timer output generates an interrupt.

ADC_CONV_INT

12-bit ADC Control

ADC end of conversion interrupt

FAULT_INT

Fault Mux Interrupt

Analog comparator interrupts, Over-Voltage detection,

Under-Voltage detection,

LLM load step detection

DPWM3

Same as DPWM1

DPWM2

Same as DPWM1

DPWM1

1) Every (1-256) switching cycles

2) Fault Detection

3) Mode switching

DPWM0

Same as DPWM1

EXT_FAULT_INT

External Faults

Fault pin interrupt

SYS_SSI_INT

System Software

System software interrupt

31 (highest)

6.4.2

Peripherals

6.4.2.1

Digital Power Peripherals

At the core of the UCD3138x controller are 3 Digital Power Peripherals (DPP). Each DPP can be

configured to drive from one to eight DPWM outputs. Each DPP consists of:

•

Differential input error ADC (EADC) with sophisticated controls

•

Hardware accelerated digital 2-pole/2-zero PID based filter

•

Digital PWM module with support for a variety of topologies

These can be connected in many different combinations, with multiple filters and DPWMs. They are

capable of supporting functions like input voltage feed forward, current mode control, and constant

current/constant power, etc.. The simplest configuration is shown in Figure 6-1:

Figure 6-1. Simple Digital Power Configuration

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