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UCD3138064ARGCR Folha de dados(PDF) 66 Page - Texas Instruments |
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UCD3138064ARGCR Folha de dados(HTML) 66 Page - Texas Instruments |
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66 / 83 page ![]() 66 UCD3138064A SLUSCA5A – DECEMBER 2015 – REVISED AUGUST 2016 www.ti.com Submit Documentation Feedback Product Folder Links: UCD3138064A Applications, Implementation, and Layout Copyright © 2015–2016, Texas Instruments Incorporated If the event registers on the DPWMs are the same, the two pairs of signals will be symmetrical. All code examples are taken from the PSFB EVM code, unless otherwise stated. 7.2.2.3 Fixed Signals to Bridge The two top signals in the above drawing have fixed timing. The DPWM1CF and DPWM2CF signals are used for these pins. DPWMCxF refers to the signal coming out of the fault module of DPWMx, as shown in Figure 7-4. Figure 7-4. Fixed Signals to Bridge |
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