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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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HD6433636SW Folha de dados(PDF) 263 Page - Renesas Technology Corp |
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HD6433636SW Folha de dados(HTML) 263 Page - Renesas Technology Corp |
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263 / 418 page  249 Figure 10.7 shows a typical flow chart for SCI3 initialization. Start Clear TE and RE to 0 in SCR3 Select communication format in SMR Set BRR value Has a 1-bit interval elapsed? Set bits RIE, TIE, TEIE, and MPIE in SCR3, and set TE or RE to 1 2 3 4 2. 3. 4. 1. Set the transmit/receive format in the serial mode register (SMR). Write the value corresponding to the desired bit rate to the bit rate register (BRR). Note that this setting is not required when using an external clock. Wait for at least a 1-bit interval, then set bits RIE, TIE, TEIE, and MPIE, and set bit TE or RE in SCR3 to 1. Setting TE or RE No Yes Wait End enables SCI3 to use the TXD or RXD pin. The initial states in asynchronous mode are the mark transmit state and the idle receive state (waiting for a start bit). 1 Set bits CKE1 and CKE0 Select the clock using serial control register 3(SCR3). Be sure to set 0 for other unused bits. When the clock output is selected in the asynchronous mode, a clock signal is output immediately after setting bits CKE1 and CKE0 appropriately. Note: In the case of simultaneous transmit/receive operations in synchronous mode, the TE bit and RE bit must be cleared to 0, or set to 1, simultaneously. Figure 10.7 Typical Flow Chart when SCI3 Is Initialized |
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