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ADIN1101CCPZ-R7 Folha de dados(PDF) 56 Page - Analog Devices

Nome de Peças ADIN1101CCPZ-R7
Descrição Electrónicos  Robust, Industrial, Low Power 10BASE-T1L PHY
PDF  79 Pages
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

ADIN1101CCPZ-R7 Folha de dados(HTML) 56 Page - Analog Devices

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Data Sheet
ADIN1101
REGISTER SUMMARY
analog.com
Rev. A | 56 of 79
Table 75. Bit Descriptions for AN_ADV_ABILITY_L (Continued)
Bits
Bit Name
Description
Reset
Access
[9:5]
RESERVED
Reserved.
0x0
R
[4:0]
AN_ADV_SELECTOR
Selector. The value of this field is fixed at 00001, which is the IEEE 802.3 selector value.
See IEEE Standard 802.3 Subclause 98.2.1.2.1.
0x1
R
BASE-T1 Autonegotiation Advertisement Register, Bits[31:16]
Device Address: 0x07; Register Address: 0x0203, Reset: 0x4000, Name: AN_ADV_ABILITY_M
This address corresponds to the BASE-T1 autonegotiation advertisement register, Bits [31:16], specified in Clause 45.2.7.21 of Standard 802.3.
Table 76. Bit Descriptions for AN_ADV_ABILITY_M
Bits
Bit Name
Description
Reset
Access
15
RESERVED
Reserved.
0x0
R
14
AN_ADV_B10L
10BASE-T1L Ability. This bit indicates that the device is compatible with 10BASE-T1L.
0x1
R/W
[13:5]
RESERVED
Reserved.
0x0
R
4
AN_ADV_MST
Leader/Follower Configuration. This bit advertises the leader/follower configuration, as follows: 0:
follower, 1: leader. See also the AN_ADV_FORCE_MS register, which determines whether this
bit expresses a preference or a forced value. See IEEE Std 802.3 Subclause 98.2.1.2.3 (leader/
follower configuration is Bit 4 of the transmitted nonce field).
Pin dependent
R/W
[3:0]
RESERVED
Reserved.
0x0
R
BASE-T1 Autonegotiation Advertisement Register, Bits[47:32]
Device Address: 0x07; Register Address: 0x0204, Reset: 0x0000, Name: AN_ADV_ABILITY_H
This address corresponds to the BASE-T1 autonegotiation advertisement register, Bits[47:32], specified in Clause 45.2.7.21 of Standard 802.3.
Table 77. Bit Descriptions for AN_ADV_ABILITY_H
Bits
Bit Name
Description
Reset
Access
[15:14]
RESERVED
Reserved.
0x0
R
13
AN_ADV_B10L_TX_LVL_HI_ABL
10BASE-T1L High Level Transmit Operating Mode Ability. This bit
advertises that the PHY is capable of transmitting in the high-
level (2.4 V p-p) transmit operating mode. This bit is used with
AN_ADV_B10L_TX_LVL_HI_REQ to configure 10BASE-T1L transmission
level (2.4 V p-p or 1.0 V p-p). See the AN_ADV_B10L_TX_LVL_HI_REQ
bit for more details.
Pin dependent
R/W
12
AN_ADV_B10L_TX_LVL_HI_REQ
10BASE-T1L High Level Transmit Operating Mode Request. This bit
advertises that the PHY is requesting that high level (2.4 V p-p) transmit
operating mode is used. The transmit level is resolved as follows:
Pin dependent
R/W
If either PHY is not capable of high level transmission (and has
AN_ADV_B10L_TX_LVL_HI_ABL = 0), both PHYs must use the low
voltage (1.0 V p-p) transmit operating mode.
Otherwise, if either PHY requests high level transmission (and has
AN_ADV_B10L_TX_LVL_HI_REQ = 1), both PHYs must use the high
voltage (2.4 V p-p) transmit operating mode. See IEEE 802.3cg Subclause
146.6.4 for more details.
[11:0]
RESERVED
Reserved.
0x0
R
BASE-T1 Autonegotiation Link Partner Base Page Ability Register, Bits[15:0]
Device Address: 0x07; Register Address: 0x0205, Reset: 0x0000, Name: AN_LP_ADV_ABILITY_L



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