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MPC8360CVVALFHA Folha de dados(PDF) 87 Page - Freescale Semiconductor, Inc |
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MPC8360CVVALFHA Folha de dados(HTML) 87 Page - Freescale Semiconductor, Inc |
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87 / 102 page ![]() MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5 Freescale Semiconductor 87 QUICC Engine Block PLL Configuration 21.3 QUICC Engine Block PLL Configuration The QUICC Engine block PLL is controlled by the RCWL[CEPMF], RCWL[CEPDF], and RCWL[CEVCOD] parameters. This table shows the multiplication factor encodings for the QUICC Engine block PLL. Table 74. QUICC Engine Block PLL Multiplication Factors RCWL[CEPMF] RCWL[CEPDF] QUICC Engine PLL Multiplication Factor = RCWL[CEPMF]/ (1 + RCWL[CEPDF]) 00000 0 × 16 00001 0 Reserved 00010 0 × 2 00011 0 × 3 00100 0 × 4 00101 0 × 5 00110 0 × 6 00111 0 × 7 01000 0 × 8 01001 0 × 9 01010 0 × 10 01011 0 × 11 01100 0 × 12 01101 0 × 13 01110 0 × 14 01111 0 × 15 10000 0 × 16 10001 0 × 17 10010 0 × 18 10011 0 × 19 10100 0 × 20 10101 0 × 21 10110 0 × 22 10111 0 × 23 11000 0 × 24 11001 0 × 25 11010 0 × 26 11011 0 × 27 11100 0 × 28 |
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