HD64F2149YV datasheet(657/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

Scroll/Zoom	100%

Fabricante Electrônico	RENESAS [Renesas Technology Corp]

Página de início	http://www.renesas.com

Logo

657 / 1075 page

Section 18B Host Interface LPC Interface (LPC)

Rev. 3.00 Jan 18, 2006 page 629 of 1044

REJ09B0280-0300

SIRQCR1 Bit 7—HIRQ11 Interrupt Enable 3 (IRQ11E3): Enables or disables a HIRQ11

interrupt request when OBF3A is set by an ODR3 write.

Bit 7

IRQ11E3

Description

HIRQ11 interrupt request by OBF3A and IRQ11E3 is disabled (Initial value)

[Clearing conditions]

• Writing 0 to IRQ11E3

• LPC hardware reset, LPC software reset

• Clearing OBF3A to 0 (when IEDIR = 0)

[When IEDIR = 0]

HIRQ11 interrupt request by setting OBF3A to 1 is enabled

[When IEDIR = 1]

HIRQ11 interrupt is requested

[Setting condition]

• Writing 1 after reading IRQ11E3 = 0

SIRQCR1 Bit 6—HIRQ10 Interrupt Enable 3 (IRQ10E3): Enables or disables a HIRQ10

interrupt request when OBF3A is set by an ODR3 write.

Bit 6

IRQ10E3

Description

HIRQ10 interrupt request by OBF3A and IRQ10E3 is disabled (Initial value)

[Clearing conditions]

• Writing 0 to IRQ10E3

• LPC hardware reset, LPC software reset

• Clearing OBF3A to 0 (when IEDIR = 0)

[When IEDIR = 0]

HIRQ10 interrupt request by setting OBF3A to 1 is enabled

[When IEDIR = 1]

HIRQ10 interrupt is requested

[Setting condition]

• Writing 1 after reading IRQ10E3 = 0

HD64F2149YV Folha de dados(PDF) 657 Page - Renesas Technology Corp