HD64F2149YV datasheet(654/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Section 18B Host Interface LPC Interface (LPC)

Rev. 3.00 Jan 18, 2006 page 626 of 1044

REJ09B0280-0300

STR3 Bit 5—Master Write Mode Flag (MWMF): Set to 1 when the host processor writes to

TWR0. MWMF is cleared to 0 when the slave processor reads TWR15.

Bit 5

MWMF

Description

[Clearing condition]

(Initial value)

When the slave processor reads TWR15

[Setting condition]

When the host processor writes to TWR0 using I/O write cycle when SWMF =

STR3 Bit 4—Slave Write Mode Flag (SWMF): Set to 1 when the slave processor writes to

TWR0. In the event of simultaneous writes by the master and the slave, the master write has

priority. SWMF is cleared to 0 when the host reads TWR15.

Bit 4

SWMF

Description

[Clearing condition]

(Initial value)

When the host processor reads TWR15 using I/O read cycle, or the slave

processor writes 0 in the SWMF bit

[Setting condition]

When the slave processor writes to TWR0 when MWMF = 0

18B.2.9 SERIRQ Control Registers (SIRQCR0, SIRQCR1)

• SIRQCR0

Bit

543

210

—

IEDIR

SMIE3B SMIE3A

SMIE2 IRQ12E1 IRQ1E1

Initial value

000

Slave Read/Write

R/W

Host Read/Write

——

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