ADIN2111BCPZ-R7 datasheet(20/129 Pages) AD

20 / 129 page

Data Sheet

ADIN2111

THEORY OF OPERATION

analog.com

Rev. A | 20 of 129

frame with a bad cyclic redundancy check CRC can be transmitted.

Once the chip is reset, the ADIN2111 is ready to bring up links.

When this software reset is initiated, a full initialization of the chip,

almost equivalent to a hardware reset, is done. The I/O pins are

held in tristate mode, the hardware configuration pins are latched,

and the I/O pins are configured for their functional mode. The crys-

tal oscillator circuit is enabled, and after the crystal starts up and

stabilizes, the PLL is enabled. Approximately 10 ms (maximum)

after writing the RESET register, the internal logic releases from

reset and the internal SPI, as well as the two PHY registers, are

accessible.

The system ready bit (CRSM_SYS_RDY) in the system status

sequence is complete, and the respective PHY is ready for normal

operation.

The CLK25_REF clock output remains low for 25 ms (maximum)

following a software reset.

PHY Subsystem Reset

A PHY subsystem reset is initiated on the ADIN2111 PHY 1

(respectively PHY 2) by setting the respective PHY subsystem

reset register bit (CRSM_PHY_SUBSYS_RST) to 1 in the PHY

subsystem reset register (CRSM_PHY_SUBSYS_RST). The reset

is applied for typically 1.2 µs, and then this bit self clears. All

of the PHY 1 (respectively PHY 2) digital circuitry is reset, and

any available active link drops. The PHY 1 (respectively PHY 2)

subsystem reset does not alter the values of the management

registers, which remain accessible throughout the sequence. The

subsystem reset is a short reset and can be used to put the device

into a known state while retaining the internal register contents.

MAC Subsystem Reset

A MAC only software reset can be initiated by writing the required

pair of keys to the software reset register (SOFT_RST). The reset

is applied for about 1.2 µs. The MAC subsystem reset interrupts

any transmit/receive packet exchange between the MAC and the

two PHYs, but does not drop any existing link or prevent a link from

being established. The MAC subsystem reset does not alter the

values of the PHY registers.

Note that PHY 1 must be out of software power-down for the MAC

subsystem reset to take effect.

STATUS LEDS

The ADIN2111 provides two configurable LED pins for each port:

P1_LED_0, P1_LED_1, P2_LED_0, and P2_LED_1 (also noted as

Px_LED_x).

The LED pin signals can be used to connect external LEDs to

indicate the ADIN2111 link status and transmit or receive activity.

The activity assigned to each LED is configurable through the LED

control register (LED_CNTRL).

The LED pins are suitable for ultra low power LEDs. The maximum

output current for each LED pin is 8 mA with a VDDIO = 3.3 V.

For higher LED power requirements, use an external transistor, as

described in the Transistor Controlled LED section.

The LED pins can also be connected to a host microcontroller

general-purpose input/output (GPIO) (configured as a pulse-width

modulated input or hardware interrupt). This configuration is useful

in applications where the user interface must be fully handled by

an external host controller (for example, an external LED module or

display).

If the LED pins are directly connected to a host controller, place a

low value resistance in series between the ADIN2111 LED pins and

the host controller to avoid any potential current surge. The resistor

value must be defined based on host controller capabilities and the

ADIN2111 LED pins output current capabilities listed in Table 1.

LED Pin Multiplexing

For the Px_LED_1 pins only (P1_LED_1 and P2_LED_1), an inter-

nal multiplexer must be configured to enable the LED signal on the

respective pin. Px_LED_1 signals are disabled by default and can

be enabled using the DIGIO_LED1_PINMUX bits in the Pin Mux

Configuration 1 register (DIGIO_PINMUX) within the respective

PHY.

The Px_LED_0 pins (P1_LED_0 and P2_LED_0) do not need

multiplexing.

LED Polarity

The four LED pins can be configured to support various LED circuit

polarities using the LED polarity register (LED_POLARITY) on the

respective PHY. Three polarity modes are available for each LED,

as follows:

►

Autosense (default)

►

Active high

►

Active low

In autosense mode, the ADIN2111 automatically senses the pin at

power-up or reset to select the appropriate polarity configuration.

In active high mode, the ADIN2111 is configured to drive the LED

from the anode side.

In active low mode, the ADIN2111 is configured to drive the LED

from the cathode side.

Example circuits are described in the LED Circuit Examples sec-

tion.

LED Function

The LED pins can be configured to display various activities of

the ADIN2111 using the LED function feature. The LED function

ADIN2111BCPZ-R7 Folha de dados(PDF) 20 Page - Analog Devices

ADIN2111BCPZ-R7 Folha de dados(HTML) 20 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Folha de dados Download

Ligação URL