ADIN2111BCPZ-R7 datasheet(5/129 Pages) AD

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Data Sheet

ADIN2111

SPECIFICATIONS

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Rev. A | 5 of 129

Table 1. General Specifications (Continued)

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

CLK25_REF Frequency Tolerance

−50

+50

ppm

Long-Term Jitter (RMS)

1 Load capacitance (CL) = ((C1 × C2)/(C1 + C2) + CSTRAY), where CSTRAY is the stray capacitance including routing and package parasitics.

2 RP and CP are the values of the equivalent parallel RC circuit to ac ground (RP||CP), modeling the driving point impedance of the XTAL_I/CLK_IN pin.

Table 2. 10BASE-T1L Specifications

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

POWER REQUIREMENTS

Supply Voltage Range

AVDD_H

3.13

3.3

3.46

2.4 V p-p or 1.0 V p-p transmit level

AVDD_L

1.71

1.8 or 3.3

3.46

DVDD1_1P1, DVDD2_1P1

1.0

1.1

1.2

VDDIO

1.71

1.8, 2.5, or 3.3

3.46

1.0 V p-p Transmit Level (Single Supply)

AVDD_H = AVDD_L = VDDIO = 1.8 V, DVDD_1P1 = DLDO_1P1

AVDD_H/AVDD_L/VDDIO Supply Current

(IAVDD_H/ IAVDD_L/IVDDIO)

Measured current (Imeasured) = IAVDD_H + IAVDD_L + IVDDIO

Power Consumption

100% data throughput, full activity

Software power-down mode

1.0 V p-p Transmit Level (Dual Supply)

AVDD_H = AVDD_L = VDDIO = 1.8 V, DVDD_1P1 = external 1.1 V

AVDD_H/AVDD_L/VDDIO Supply Current

Imeasured = IAVDD_H + IAVDD_L + IVDDIO

DVDD Supply Current (IDVDD)

Supply for DVDD1_1P1 and DVDD2_1P1 pins, Imeasured = IDVDD

Power Consumption

100% data throughput, full activity

2.4 V p-p Transmit Level (Single Supply)

AVDD_H = AVDD_L = VDDIO = 3.3 V, DVDD_1P1 = DLDO_1P1

AVDD_H/AVDD_L/VDDIO Supply Current

Imeasured = IAVDD_H + IAVDD_L + IVDDIO

Power Consumption

215

100% data throughput, full activity

Software power-down mode

2.4 V p-p Transmit Level (Dual Supply)

AVDD_H = 3.3 V, AVDD_L = VDDIO = 1.8 V, DVDD_1P1 =

DLDO_1P1

AVDD_H Supply Current

32.5

Imeasured = IAVDD_H

AVDD_L/VDDIO Supply Current

Imeasured= IAVDD_L + IVDDIO

Power Consumption

162

100% data throughput, full activity

Software power-down mode

2.4 V p-p Transmit Level (Triple Supply)

AVDD_H = 3.3 V, AVDD_L = VDDIO = 1.8 V, DVDD_1P1 = external

1.1 V

AVDD_H Supply Current

Imeasured = IAVDD_H

AVDD_L/VDDIO Supply Current

Imeasured = IAVDD_L + IVDDIO

DVDD Supply Current

External supply for DVDD1_1P1 and DVDD2_1P1 pins, Imeasured =

IDVDD

Power Consumption

149

100% data throughput, full activity

ANALOG INPUTS AND OUTPUTS

MDI Gain Offset

−7.5

+3.5

TIMING/LATENCY

Port to Port Latency

PHY Rx

6.4

μs

PHY 1 or PHY 2 Rx latency

Switch

12.6

μs

PHY Tx

3.2

μs

PHY 1 or PHY 2 Tx latency

Total Latency

22.2

μs

System/PHY 1 Reset to Standby Delay

Delay after RESET pin released; internal MAC registers and Port 1

PHY registers accessible

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