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MCP47FXB2XT-EST Folha de dados(PDF) 87 Page - Microchip Technology |
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MCP47FXB2XT-EST Folha de dados(HTML) 87 Page - Microchip Technology |
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87 / 124 page ![]() 2020 Microchip Technology Inc. DS20006368A-page 87 MCP47FXBX4/8 FIGURE 7-7: Continuous READ Command of Specified Address. Note 1: The Acknowledge bit is generated by the MCP47FXBX4/8. 2: The master device is responsible for A/A signal. If an A signal occurs, the MCP47FXBX4/8 will abort this transfer and release the bus. 3: The master device will Not Acknowledge and the MCP47FXBX4/8 will release the bus so the master device can generate a Stop or repeated Start condition. 4: At the falling edge of the SCL pin for the READ command ACK bit, the MCP47FXBX4/8 updates the value of the specified device register. Memory Address I2C ACK bit(1) SA 6 S SA 5 SA 4 SA 3 SA 2 SA 1 SA 0 0 0 A AD 4 AD 3 AD 2 AD 1 AD 0 1 1 X A AD n A A P S X SA n 1 1 I2C Start bit I2C Slave Address I2C Write bit Read command Reserved, set to ‘0‘ I2C Stop bit(4) D nn Data (read from memory) Control byte Read command Legend: Sr 0 0 0 0 D 11 D 10 D 09 D 08 D 07 D 06 D 05 D 04 D 03 D 02 D 01 D 00 A P A Data Read MSB Data Read LSB SA 6 SA 5 SA 4 SA 3 SA 2 SA 1 SA 0 1 Control byte A I2C ACK bit(2) I2C NACK bit(3) A 1 I2C Read bit Sr I2C Start bit, repeated 0 0 0 0 D 11 D 10 D 09 D 08 D 07 D 06 D 05 D 04 D 03 D 02 D 01 D 00 A A Data Read MSB Data Read LSB A 0 0 0 0 D 11 D 10 D 09 D 08 D 07 D 06 D 05 D 04 D 03 D 02 D 01 D 00 A A Data Read MSB Data Read LSB A |
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