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MCP47FXB2XT-EST Folha de dados(PDF) 18 Page - Microchip Technology |
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MCP47FXB2XT-EST Folha de dados(HTML) 18 Page - Microchip Technology |
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18 / 124 page ![]() MCP47FXBX4/8 DS20006368A-page 18 2020 Microchip Technology Inc. 1.1.3 RESET AND POWER-DOWN TIMING FIGURE 1-3: Power-on and Brown-out Reset Waveforms. FIGURE 1-4: I2C Power-Down Command Waveforms. VDD SDA tPORD tBORD VOUT SCL VIH VIH VBOR VOUT at High-Z I2C Interface is operational VPOR SDA SCL ACK Stop Start ACK VOUT tPDE tPDD TABLE 1-3: RESET AND POWER-DOWN TIMING Timing Characteristics Standard Operating Conditions (unless otherwise specified): Operating Temperature: -40°C TA +125°C (Extended) Unless otherwise noted, all parameters apply across these specified operating ranges: VDD = +2.7V to 5.5V, VSS = 0V RL = 5 k from VOUT to VSS, CL = 100 pF Typical specifications represent values for VDD = 5.5V, TA = +25°C. Parameters Sym. Min. Typ. Max. Units Conditions Power-on Reset Delay tPORD —60 — µs Brown-out Reset Delay tBORD —45 — µs VDD transitions from VDD(MIN) > VPOR VOUT driven to VOUT disabled Power-Down DAC Output Disable Time Delay TPDE —10.5 — µs PDnB:PDnA = 00 11, 10 or 01 started from the falling edge of the SCL at the end of the 8th clock cycle, VOUT = VOUT – 10 mV. VOUT not connected. Power-Down DAC Output Enable Time Delay TPDD — 1 — µs PDnB:PDnA = 11, 10 or 01 -> 00 started from the falling edge of the SCL at the end of the 8th clock cycle. Volatile DAC Register = FFh, VOUT =10mV. VOUT not connected. |
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