SIO1007 datasheet(72/108 Pages) MICROCHIP

72 / 108 page

SIO1007

DS00002020A-page 72

 2005 - 2015 Microchip Technology Inc.

When the activate bit in CR3A-bit2 is cleared to 0, no address decoding takes place for the CIRCC2 logical device.

To disable CIRCC2 Port, set Bit[2] of the Activate register located at CR3A.

18.4.31

CR20

CR20 can only be accessed in the configuration state and after the CSR has been initialized to 20h. CR20 is used to

select the high byte of the base address ADR[15:10] bits of CIrCC2 Logical Device.

The CIRCC2 logical device base address is initialized using the base address bits located in two configuration registers:

CR1F-low byte and CR20-high byte. The CIRCC2 base address can be set to 8,192 locations on 8-byte boundaries

from 0000H - FFF8H.

The CIRCC2 base address bits A[2:0] are decoded as 000b. The CIRCC2 block uses full 16-bit addressing decoding.

An address matching the CIRCC2 base address bits A[15:3] is decoded using the specific address bits A[2:0] to target

registers in CIRCC2.

When the activate bit in CR3A-bit2 is cleared to 0, no address decoding takes place for the CIRCC2 logical device.

To disable CIRCC2 Port, set Bit[2] of the Activate register located at CR3A.

18.4.32

CR21

CR21 can only be accessed in the configuration state and after the CSR has been initialized to 21H. CR21 is used to

select the high byte of the base address ADR[15:12] bits of Runtime Register Logical Device.

Runtime Register Address Decoding: address bits A[11:4] are programmable in CR30. The Runtime register base

address bits A[3:0] are decoded as 0000b. An address matching the Runtime register base address bits A[15:4]

decodes the specific address bits A[3:0] for the registers in Section 17.0, "Runtime Registers," on page 53.

TABLE 18-26: CR1F

CIRCC2 Base Address Register (Low Byte)

Type: R/W

Default: 0x00 on VCC POR

BIT NO.

BIT NAME

DESCRIPTION

Reserved

Read Only. A read returns 0.

ADR3

CIRCC2 Port Base Address bits[9:3] for decoder.

ADR4

ADR5

ADR6

ADR7

ADR8

ADR9

TABLE 18-27: CR20

CIRCC2 Base Address Register (High Byte)

Type: R/W

Default: 0x00 on VCC POR

BIT NO.

BIT NAME

DESCRIPTION

ADR10

CIRCC2 Port Base Address bits[15:10] for decoder.

ADR11

ADR12

ADR13

ADR14

ADR15

Reserved

Read Only. A read returns 0.

Reserved

Read Only. A read returns 0.

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