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SIO1007 Folha de dados(PDF) 33 Page - Microchip Technology

Nome de Peças SIO1007
Descrição Electrónicos  LPC Super I/O LPC IrDA Hot Docking Chip with UART
PDF  108 Pages
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SIO1007 Folha de dados(HTML) 33 Page - Microchip Technology

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 2005 - 2015 Microchip Technology Inc.
DS00002020A-page 33
SIO1007
9.7
Logical Device IRQ and DMA Operation
Any time the IRQ or DMA channel for a UART logical block is disabled by a register bit in that logical block, the IRQ
and/or DMA channel is disabled. This is in addition to the IRQ and DMA channel disabled by the Configuration Registers
(active bit or address not valid).
The Modem Control Register (MCR) Bit D2 (OUT2) - When OUT2 is a logic "0", the serial port interrupts disabled.
Disabling DMA Enable bit, disables DMA for UART2. Refer to the IrCC specification.
9.8
Output Pin States
The TXD1, nRTS1 & nDTR1 pin states change prior to intialization depending on VCC POR, and the state of the UART1
Power bit (bit[3] in CR02 on page 61).
TABLE 9-6:
OUTPUT PIN STATES
Power
CR02 Bit[3]
VCC POR
State of TXD1, nRTS1 & nDTR1 Pins
0 Default
Active edge
Tristate
0
After POR
Tristate
1HIGH



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