ADMV1455BBCZ-R7 datasheet(13/141 Pages) AD

13 / 141 page

Data Sheet

ADMV1455

ABSOLUTE MAXIMUM RATINGS

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Rev. 0 | 13 of 141

THERMAL RESISTANCE

Thermal performance is directly linked to the printed circuit board

(PCB) design and operating environment. Careful attention to PCB

thermal design is required.

θJC_TOP is thermal resistance, junction to case (°C/W).

Only use θJC_TOP to compare the thermal performance of different

packages when all test conditions listed are similar to JEDEC

specifications. Otherwise, use ΨJT and ΨJB to calculate the device

junction temperature using the following equations:

TJ = (P × ΨJT) + TTOP

where:

P is the total power dissipation in the chip (W).

ΨJT is the junction to top thermal characterization number.

TTOP is the package top temperature (°C). TTOP is measured at the

top center of the package.

TJ = (P × ΨJB) + TBOARD

where:

P is the total power dissipation in the chip (W).

ΨJB is the junction to board thermal characterization number.

TBOARD is the board temperature measured on the midpoint of the

longest side of the package, no more than 1 mm from the edge of

the package body (°C).

As stated in JEDEC51-12, only use the previous equations when no

heat sink or a heat spreader is present. When a heat sink or heat

spreader is added, use θJC_TOP to estimate or calculate the junction

temperature.

Table 14 shows the temperature rise from case to junction

(TRISE_JC) based on a power map based on a JEDEC (JESD51-2)

board, as opposed to a JEDEC standard of uniform power dissi-

pation across the ADMV1455 package. TRISE_JC applies to all

conditions of operation and results in a higher calculated junction

temperature. However, TRISE_JC results in a more accurate calcu-

lation of the junction temperature on a JEDEC board with the

ADMV1455.

To calculate TBOARD,max (maximum case temperature referred to the

bottom of the package or the nearest point on the board to the

package), use the following equations and refer to Figure 2:

TBOARD, MAX = TJ, MAX– TRISE_JC – P × θJC_BOT

(1)

If the bottom side is applied to the PCB bottom surface then the

following:

TBOARD = TBASE_PLATE + P × θBOARD+ P × θ TIM

(2)

where:

P is the total power dissipation in the chip (W).

TJ, MAX is the maximum junction temperature (°C) in Table 9.

TBOARD, MAX is the maximum board temperature measured on the

midpoint of the longest side of the package no more than 1 mm

from the edge of the package body (°C).

TRISE_JC is the highest temperature rise (°C) from case to junction in

Table 14.

TBOARD is the board temperature measured on the midpoint of the

longest side of the package no more than 1 mm from the edge of

the package body (°C).

TBASE_PLATE is the temperature of the base plate of the heatsink.

θTIM is the thermal resistance (°C/W) of the TIM.

θBOARD is the thermal resistance (°C/W) of the board.

θJC_BOT is the junction to top case thermal resistance (°C/W) in

Table 15.

Figure 2. Circuit Level Description of Power Map (Left) and Uniform Power

Dissipation Methods (Right)

Table 14. Temperature Rise Based on a Power Map

Package Type1

TRISE_JC

Unit

BC-120-4

°C

1 See JEDEC Standard JESD51-2 for additional information on optimizing the

thermal impedance.

The thermal resistance of the ADMV1455 assuming the JE-

DEC standard of uniform power dissipation based on a JEDEC

(JESD51-2) board is shown in Table 15. Thermal resistance based

on a uniform power dissipation is useful to compare the perform-

ance of the ADMV1455 to other similar ICs.

Table 15. Thermal Resistance Based on Uniform Power Dissipation

Package Type

θJC_BOT1

θJC_TOP2

ΨJT ΨJB θJA

Unit

BC-120-4

2.3

3.0

0.1

7.3

24.3

°C/W

1 See JEDEC Standard JESD51-2 for additional information on optimizing the

thermal impedance.

2 See JEDEC Standard JESD51-2 for additional information on optimizing the

thermal impedance.

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