ADMV1455BBCZ-R7 datasheet(8/141 Pages) AD

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Data Sheet

ADMV1455

SPECIFICATIONS

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Rev. 0 | 8 of 141

I/Q BASEBAND MODE

DSA_IN Input, High Band

TC = 25°C, VDD_BB = 2.5V, all other supply voltages = 1.8V, PRF = −40dBm, PLO = −5dBm, fRF = 49GHz, baseband frequency (fBB) = 100MHz,

fLO = 48.9GHz (upper sideband), maximum gain, RF LPF setting = 0x00 (highest cutoff), RF HPF setting = 0x3F (lowest cutoff), and VOCM

setting = 0x0C, unless otherwise noted.

Measurements performed with high gain settings (Register 0x194, Bits[1:0], = 0b'11) with on-board matching network, unless otherwise noted.

Measurements performed as single-ended measurements on BB_IP output only, with other outputs BB_IN, BB_QP, and BB_QN terminated in

50Ω loads, unless otherwise noted. Data is corrected for 8.15dB of output matching-network loss and 3dB of differential loss, unless otherwise

noted.

Table 6. DSA_IN Input, High Band

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

DSA PERFORMANCE

Full Attenuation Range

Set DSA1 to DSA3 maximum attenuation

Attenuation Step Size

DSA1

DSA2

DSA3

Attenuation Step Error

DSA1

±0.2

DSA2

±0.2

DSA3

±0.2

RX I/Q BASEBAND MODE, HIGH BAND, DSA_IN PERFORMANCE

DSA_IN input pin, BB_IP output pin with other baseband

outputs terminated, and DSA_OUT connected by short

50Ω line to RF_IN on PCB

Conversion Gain

Gain Setting High

For 50Ω operation

Gain Stetting Low

For 100Ω operation

Noise Figure, Single Sideband

Measured with output balun combining BB_IP and

BB_IN, corrected −3dB for single sideband

fBB > 1GHz

Thermal noise floor

12.3

fBB < 100MHz

1/f noise corner

15.3

Input P1dB

−7.5

dBm

IP3

100MHz tone spacing

dBm

Baseband Quadrature Imbalance

0GHz to 8GHz

Amplitude

±0.8

Phase

±5

Degrees

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