ADMV1455BBCZ-R7 datasheet(71/141 Pages) AD

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Data Sheet

ADMV1455

THEORY OF OPERATION

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Rev. 0 | 71 of 141

Digital Diagrams

Figure 171. Filter Diagram

Figure 172. Gain Diagram

SYNCHRONOUS LOAD FEATURE

The ADMV1455 includes a synchronous load feature that allows

the filter settings and gain settings to be applied at specific trigger

rising edge events on the LOAD ball. See Figure 168 for the LOAD

feature timing. To enable the load feature for the filter settings,

set Register 0x208 to 1. To enable the load feature for the gain

settings, set Register 0x281 to 1.

FILTER LUT

The digital logic contains a filter LUT that can be used to determine

the state of the LO tunable filters, RF tunable filters, and GPO_F

logic outputs. This LUT can be beneficial for fast frequency hopping

applications, where it may be necessary to quickly change chip

configuration states.

To use the LUT, set Register 0x202 to 1 and setup the LUT from

The LUT contains two pages that have 32 indices each, or 64 total.

To select Page A, set Register 0x207 to 0. To select Page B, set

There are three potential sources for the LUT index (pointer), as

determined by Register 0x203. The pointer can be set by using the

parallel logic input ADD_F balls, by using Register 0x209, or by

using the internal state machine. Set Register 0x203 to 0 to use

ADD_F balls as the pointer, set Register 0x203 to 1 to use Register

0x209 as the pointer, and Register 0x203 set to 2 to use the internal

state machine.

Regardless of the LUT pointer source, use Register 0x240 to read

back the pointer value.

The LUT output values can be read from Register 0x211 to Register

0x21D. The values in these registers represent the filter values prior

to the mux controlled by Register 0x202 and the LOAD feature.

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