ADMV1455BBCZ-R7 datasheet(69/141 Pages) AD

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Data Sheet

ADMV1455

THEORY OF OPERATION

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Rev. 0 | 69 of 141

Chip Disable and Reset

When it is desired to either disable the chip or reset the chip, follow

Figure 169 starting at tCONTINUE. Wait a minimum of t22 from the last

SPI instruction before disabling the chip by setting the CEN input

low at tDISABLE.

After setting the CEN input low, wait a minimum of t23 to allow the

RF portions of the chip to power down. The RST input can then be

set low for a minimum of t24 before the RST input can be set high

again. Wait a minimum of t3 before looping back to tINITIALIZE, which

is shown in Figure 167.

Figure 169. Chip Disable and Reset Timing Diagram

Chip Disable and Power-Down

When it is desired to disable and power down the chip, follow

Figure 170 starting at tCONTINUE. Wait a minimum of t22 from the last

SPI instruction before disabling the chip by setting the CEN input

low at tDISABLE.

After setting the CEN input low, wait a minimum of t25 to allow

the RF portions of the chip to power down before starting the

chip power down at tPOWER-DOWN. At tPOWER-DOWN, all other logic

inputs must be set low with a fall time of t26, and the power supply

voltages can be turned off with a fall time of t27. Ideally, the logic

inputs are removed prior to the power supply ramp down, but they

can occur simultaneously provided that the logic inputs fall time

does not exceed the t26 maximum time. Note that the time units for

t26 are in microseconds, and the time units for t27 are milliseconds.

Figure 170. Chip Disable and Power-Down Timing Diagram

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