ADMV1455BBCZ-R7 datasheet(103/141 Pages) AD

103 / 141 page

Data Sheet

ADMV1455

analog.com

Rev. 0 | 103 of 141

Table 53. Bit Descriptions for REG0108 (Continued)

Bits

Bit Name

Description

Reset

Access

10: Monitor RF Input LNA. When the RF input LNA experiences excessive RF input power, the

RX_LNA_OVERLOAD bit is asserted high, and many of the RF portions of the chip are powered

down until the excessive RF input power is removed.

11: Monitor RF Input LNA and Latch. When the RF input LNA experiences excessive

RF input power, the RX_LNA_OVERLOAD_LATCHED bit is asserted high, and many of

the RF portions of the chip are powered down. When the excessive RF input power is

removed, the RF portions of the chip continue to be powered down. To power up the RF

portions of the chip, the RX_LNA_OVERLOAD_LATCHED bit must be cleared, which can be

accomplished by setting OVERLOAD_PROTECTION_MODE to any other value. Ensure to

set OVERLOAD_PROTECTION_MODE back to the desired mode after performing the clear

operation.

Address: 0x15C, Reset: 0x05, Name: REG015C

Figure 204.

Table 54. Bit Descriptions for REG015C

Bits

Bit Name

Description

Reset

Access

[7:5]

RESERVED

Reserved.

0x0

[4:0]

BB_I_VOCM

Baseband I Output Common-Mode Voltage.

0x5

R/W

Address: 0x165, Reset: 0x05, Name: REG0165

Figure 205.

Table 55. Bit Descriptions for REG0165

Bits

Bit Name

Description

Reset

Access

[7:5]

RESERVED

Reserved.

0x0

[4:0]

BB_Q_VOCM

Baseband Q Output Common-Mode Voltage.

0x5

R/W

Address: 0x172, Reset: 0x0F, Name: REG0172

Figure 206.

Table 56. Bit Descriptions for REG0172

Bits

Bit Name

Description

Reset

Access

[7:5]

RESERVED

Reserved.

0x0

[4:0]

LNA_OVERLOAD_THRESHOLD

LNA Overload Protection Threshold.

0xF

R/W

Address: 0x173, Reset: 0x0F, Name: REG0173

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