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BQ25708 Folha de dados(PDF) 37 Page - Texas Instruments |
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BQ25708 Folha de dados(HTML) 37 Page - Texas Instruments |
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37 / 94 page ![]() 9.6.1 Setting Charge and PROCHOT Options 9.6.1.1 ChargeOption0 Register (I2C address = 01/00h) [reset = E70Eh] Figure 9-12. ChargeOption0 Register (I2C address = 01/00h) [reset = E70Eh] 7 6 5 4 3 2 1 0 EN_LWPWR WDTMR_ADJ IDPM_AUTO_ DISABLE OTG_ON_ CHRGOK EN_OOA PWM_FREQ PTM_LL_EFF R/W R/W R/W R/W R/W R/W R/W 7 6 5 4 3 2 1 0 Reserved SYS_SHORT DISABLE EN_LEARN IADPT_GAIN IBAT_GAIN EN_LDO EN_IDPM CHRG_INHIBIT R/W R/W R/W R/W R/W R/W R/W R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 9-5. ChargeOption0 Register (I2C address = 01h) Field Descriptions I2C 01h FIELD TYPE RESET DESCRIPTION 7 EN_LWPWR R/W 1b Low Power Mode Enable 0b: Disable Low Power Mode. Device in performance mode with battery only. The PROCHOT, current/power monitor buffer and comparator follow register setting. 1b: Enable Low Power Mode. Device in low power mode with battery only for lowest quiescent current. The LDO is off. The PROCHOT, discharge current monitor buffer, power monitor buffer and independent comparator are disabled. ADC is not available in Low Power Mode.Independent comparator can be enabled by setting either REG0X31()[6] or [5] to 1. <default at POR> 6-5 WDTMR_ADJ R/W 11b WATCHDOG Timer Adjust Set maximum delay between consecutive I2C write of charge voltage or charge current command. If device does not receive a write on the REG0x05/04() or the REG0x03/02() within the watchdog time period, the charger will be suspended by setting the REG0x03/02() to 0 mA. After expiration, the timer will resume upon the write of REG0x03/02(), REG0x05/04() or REG0x01[6:5]. The charger will resume if the values are valid. 00b: Disable Watchdog Timer 01b: Enabled, 5 sec 10b: Enabled, 88 sec 11b: Enable Watchdog Timer, 175 sec <default at POR> 4 IDPM_AUTO_ DISABLE R/W 0b IDPM Auto Disable When CELL_BATPRESZ pin is LOW, the charger automatically disables the IDPM function by setting EN_IDPM (REG0x00[1]) to 0. The host can enable IDPM function later by writing EN_IDPM bit (REG0x00[1]) to 1. 0b: Disable this function. IDPM is not disabled when CELL_BATPRESZ goes LOW. <default at POR> 1b: Enable this function. IDPM is disabled when CELL_BATPRESZ goes LOW. 3 OTG_ON_ CHRGOK R/W 0b Add OTG to CHRG_OK Drive CHRG_OK to HIGH when the device is in OTG mode. 0b: Disable <default at POR> 1b: Enable www.ti.com BQ25713, BQ25713B SLUSD83C – JUNE 2018 – REVISED MAY 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: BQ25713 BQ25713B |
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