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BQ25708 Folha de dados(PDF) 34 Page - Texas Instruments |
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BQ25708 Folha de dados(HTML) 34 Page - Texas Instruments |
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34 / 94 page ![]() When SDA remains HIGH during the 9th clock pulse, this is the Not Acknowledge signal. The master can then generate either a STOP to abort the transfer or a repeated START to start a new transfer. 9.5.1.5 Slave Address and Data Direction Bit After the START, a slave address is sent. This address is 7 bits long followed by the eighth bit as a data direction bit (bit R/W). A zero indicates a transmission (WRITE) and a one indicates a request for data (READ). SCL SDA START S 1-7 8 9 ACK 1-7 8 9 ACK 1-7 8 9 STOP P ADDRESS R/W DATA ACK DATA Figure 9-7. Complete Data Transfer 9.5.1.6 Single Read and Write Figure 9-8. Single Write Figure 9-9. Single Read If the register address is not defined, the charger IC send back NACK and go back to the idle state. 9.5.1.7 Multi-Read and Multi-Write The charger device supports multi-read and multi-write. Figure 9-10. Multi Write BQ25713, BQ25713B SLUSD83C – JUNE 2018 – REVISED MAY 2023 www.ti.com 34 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: BQ25713 BQ25713B |
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