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BQ25708 Folha de dados(PDF) 18 Page - Texas Instruments

Nome de Peças BQ25708
Descrição Electrónicos  BQ25713, BQ25713B I2C Narrow VDC Buck-Boost Battery Charge Controller With System Power Monitor and Processor Hot Monitor
PDF  94 Pages
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Fabricante Electrônico  TI2 [Texas Instruments]
Página de início  https://www.ti.com
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8.5 Electrical Characteristics (continued)
over TJ = -40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
LOGIC INPUT (SDA, SCL, OTG/VAP)
VIN_ LO
Input low threshold
I2C
0.4
V
VIN_ HI
Input high threshold
I2C
1.3
V
LOGIC OUTPUT OPEN DRAIN (SDA, CHRG_OK, CMPOUT)
VOUT_ LO
Output saturation voltage
5 mA drain current
0.4
V
VOUT_ LEAK
Leakage current
V = 7 V
–1
1
µA
LOGIC OUTPUT OPEN DRAIN SDA
VOUT_ LO_SDA
Output Saturation Voltage
5 mA drain current
0.4
V
VOUT_ LEAK_SDA
Leakage Current
V = 7V
–1
1
µA
LOGIC OUTPUT OPEN DRAIN CHRG_OK
VOUT_ LO_CHRG_OK
Output Saturation Voltage
5 mA drain current
0.4
V
VOUT_ LEAK _CHRG_OK
Leakage Current
V = 7V
–1
1
µA
LOGIC OUTPUT OPEN DRAIN CMPOUT
VOUT_ LO_CMPOUT
Output Saturation Voltage
5 mA drain current
0.4
V
VOUT_ LEAK _CMPOUT
Leakage Current
V = 7V
–1
1
µA
LOGIC OUTPUT OPEN DRAIN (PROCHOT)
VOUT_ LO_PROCHOT
Output saturation voltage
50 Ω pullup to 1.05 V / 5-mA
300
mV
VOUT_ LEAK_PROCHOT
Leakage current
V = 5.5 V
–1
1
µA
ANALOG INPUT (ILIM_HIZ)
VHIZ_ LO
Voltage to get out of HIZ mode
ILIM_HIZ pin rising
0.8
V
VHIZ_ HIGH
Voltage to enable HIZ mode
ILIM_HIZ pin falling
0.4
V
ANALOG INPUT (CELL_BATPRESZ)
VCELL_4S
4S
REGN of REGN = 6 V, as
percentage
68.4
75
%
VCELL_3S
3S
REGN of REGN = 6 V, as
percentage
51.7
55
65
%
VCELL_2S
2S
REGN of REGN = 6 V, as
percentage
35
40
49.1
%
VCELL_1S
1S
REGN of REGN = 6 V, as
percentage
18.4
25
31.6
%
VCELL_BATPRESZ_RISE
Battery is present
CELL_BATPRESZ rising
18
%
VCELL_BATPRESZ_FALL
Battery is removed
CELL_BATPRESZ falling
15
%
8.6 Timing Requirements
MIN
NOM
MAX
UNIT
I2C TIMING CHARACTERISTICS
tr
SCLK/SDATA rise time
300
ns
tf
SCLK/SDATA fall time
300
ns
tW(H)
SCLK pulse width high
0.6
50
µs
tW(L)
SCLK Pulse Width Low
1.3
µs
tSU(STA)
Setup time for START condition
0.6
µs
tH(STA)
START condition hold time after which first clock pulse is generated
0.6
µs
tSU(DAT)
Data setup time
100
ns
tH(DAT)
Data hold time
300
ns
tSU(STOP) Setup time for STOP condition
0.6
µs
BQ25713, BQ25713B
SLUSD83C – JUNE 2018 – REVISED MAY 2023
www.ti.com
18
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: BQ25713 BQ25713B



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