AD6654SLASHPCB datasheet(7/88 Pages) AD

7 / 88 page

AD6654

Rev. 0 | Page 7 of 88

ADC SWITCHING SPECIFICATIONS

AVDD = 5.0 V, DRVDD = 3.3 V, VDDCORE = 1.8 V, VDDIO = 3.3 V, maximum rated sample rate, differential input, unless

otherwise noted.

Table 4.

Parameter (Conditions)

Temp

Test Level

Min

Typ

Max

Unit

SWITCHING PERFORMANCE

Maximum Conversion Rate

Full

92.16

MSPS

Minimum Conversion Rate

Full

MSPS

ENC Pulse Width High1 (tENCH)

Full

5.154

5.425

ENC Pulse Width Low1 (tENCL)

Full

5.154

5.425

1 Several internal timing parameters are a function of t

ENCL

and tENCH, optimum performance will be achieved with 50/50 duty cycle.

ADC AC SPECIFICATIONS

AVDD = 5.0 V, DRVDD = 3.3 V, VDDCORE = 1.8 V, VDDIO = 3.3 V, maximum rated sample rate, differential input, unless

otherwise noted.

Table 5.

Parameter (Conditions)

Temp

Test Level

Min

Typ

Max

Unit

SIGNAL-TO-NOISE RATIO1 (WITHOUT HARMONICS)

Analog Input Frequency 37 MHz

ADC (46.08 MHz BW)

25°C

74.5

CDMA (1.25 MHz BW)

Full

90.0

WCDMA (5.0 MHz BW)

25°C

Analog Input Frequency 70 MHz

ADC (46.08 MHz BW)

25°C

73.5

CDMA (1.25 MHz BW)

Full

87.5

WCDMA (5.0 MHz BW)

25°C

Analog Input Frequency 150 MHz

ADC (46.08 MHz BW)

25°C

CDMA (1.25 MHz BW)

25°C

WCDMA (5.0 MHz BW)

25°C

Analog Input Frequency 200 MHz

ADC (46.08 MHz BW)

25°C

CDMA (1.25 MHz BW)

25°C

WCDMA (5.0 MHz BW)

25°C

WORST HARMONIC2 (ANALOG INPUT @ −1 dBFS)

37 MHz

Full

dBc

70 MHz

Full

dBc

150 MHz

Full

dBc

200 MHz

Full

dBc

INTERMODULATION DISTORTION (TWO-TONES SEPARATED BY 1 MHz)3

Analog Input = 55/56 MHz

25°C

dBc

ANALOG INPUT BANDWIDTH

25°C

270

MHz

1 Analog input = −1 dB below full scale.

2 Includes Harmonic 2 through Harmonic 6.

3 Analog input = each −7 dB below full scale.

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