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PIC12F508 Folha de dados(PDF) 18 Page - Microchip Technology |
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PIC12F508 Folha de dados(HTML) 18 Page - Microchip Technology |
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18 / 110 page ![]() PIC12F508/509/16F505 DS41236E-page 18 © 2009 Microchip Technology Inc. 4.2 Program Memory Organization For The PIC16F505 The PIC16F505 device has a 11-bit Program Counter (PC) capable of addressing a 2K x 12 program memory space. The 1K x 12 (0000h-03FFh) for the PIC16F505 are physically implemented. Refer to Figure 4-2. Accessing a location above this boundary will cause a wrap-around within the first 1K x 12 space. The effective Reset vector is at 0000h (see Figure 4-2). Location 03FFh contains the internal oscillator calibration value. This value should never be overwritten. FIGURE 4-2: PROGRAM MEMORY MAP AND STACK FOR THE PIC16F505 4.3 Data Memory Organization Data memory is composed of registers or bytes of RAM. Therefore, data memory for a device is specified by its register file. The register file is divided into two functional groups: Special Function Registers (SFR) and General Purpose Registers (GPR). The Special Function Registers include the TMR0 register, the Program Counter (PCL), the STATUS register, the I/O registers (ports) and the File Select Register (FSR). In addition, Special Function Registers are used to control the I/O port configuration and prescaler options. The General Purpose Registers are used for data and control information under command of the instructions. For the PIC12F508/509, the register file is composed of 7 Special Function Registers, 9 General Purpose Registers and 16 or 32 General Purpose Registers accessed by banking (see Figure 4-3 and Figure 4-4). For the PIC16F505, the register file is composed of 8 Special Function Registers, 8 General Purpose Registers and 64 General Purpose Registers accessed by banking (Figure 4-5). 4.3.1 GENERAL PURPOSE REGISTER FILE The General Purpose Register file is accessed, either directly or indirectly, through the File Select Register (FSR). See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”. CALL, RETLW PC<11:0> Stack Level 1 Stack Level 2 12 0000h 7FFh 01FFh 0200h Reset Vector(1) Note 1: Address 0000h becomes the effective Reset vector. Location 03FFh contains the MOVLW XX internal oscillator calibration value. 1024 Words 03FFh 0400h On-chip Program Memory |
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