PIC12F508_09 datasheet(33/110 Pages) MICROCHIP

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DS41236E-page 33

PIC12F508/509/16F505

5.5

I/O Programming Considerations

5.5.1

BIDIRECTIONAL I/O PORTS

Some instructions operate internally as read followed

by write operations. The BCF and BSF instructions, for

example, read the entire port into the CPU, execute the

bit operation and re-write the result. Caution must be

used when these instructions are applied to a port

where one or more pins are used as input/outputs. For

example, a BSF operation on bit 5 of PORTB/GPIO will

cause all eight bits of PORTB/GPIO to be read into the

CPU, bit 5 to be set and the PORTB/GPIO value to be

written to the output latches. If another bit of PORTB/

GPIO is used as a bidirectional I/O pin (say bit 0) and it

is defined as an input at this time, the input signal pres-

ent on the pin itself would be read into the CPU and

rewritten to the data latch of this particular pin, overwrit-

ing the previous content. As long as the pin stays in the

Input mode, no problem occurs. However, if bit 0 is

switched into Output mode later on, the content of the

data latch may now be unknown.

Example 5-1 shows the effect of two sequential

Read-Modify-Write instructions (e.g., BCF, BSF, etc.)

on an I/O port.

A pin actively outputting a high or a low should not be

driven from external devices at the same time in order

to change the level on this pin (“wired OR”, “wired

AND”). The resulting high output currents may damage

the chip.

EXAMPLE 5-1:

READ-MODIFY-WRITE

INSTRUCTIONS ON AN

I/O PORT(e.g., PIC16F505)

5.5.2

SUCCESSIVE OPERATIONS ON

I/O PORTS

The actual write to an I/O port happens at the end of an

instruction cycle, whereas for reading, the data must be

valid at the beginning of the instruction cycle (Figure 5-2).

Therefore, care must be exercised if a write followed by

a read operation is carried out on the same I/O port. The

sequence of instructions should allow the pin voltage to

stabilize (load dependent) before the next instruction

causes that file to be read into the CPU. Otherwise, the

previous state of that pin may be read into the CPU rather

than the new state. When in doubt, it is better to separate

these instructions with a NOP or another instruction not

accessing this I/O port.

FIGURE 5-2:

SUCCESSIVE I/O OPERATION (PIC16F505 Shown)

;Initial PORTB Settings

;PORTB<5:3> Inputs

;PORTB<2:0> Outputs

;

PORTB latch

PORTB pins

;

----------

BCF

PORTB, 5 ;--01 -ppp

--11 pppp

BCF

PORTB, 4 ;--10 -ppp

--11 pppp

MOVLW

007h;

TRIS

PORTB

;--10 -ppp

--11 pppp

;

Note

The user may have expected the pin values to

be ‘--00 pppp’. The 2nd BCF caused RB5 to

be latched as the pin value (High).

PC + 1

PC + 2

PC + 3

Q1 Q2

Q3 Q4

Q1 Q2 Q3 Q4

Q2 Q3 Q4

Q1 Q2

Q3 Q4

Instruction

Fetched

RB<5:0>

MOVWF PORTB

NOP

Port pin

sampled here

NOP

MOVF PORTB

, W

Instruction

Executed

MOVWF PORTB

(Write to PORTB)

NOP

MOVF PORTB,W

This example shows a write to PORTB

followed by a read from PORTB.

Data setup time = (0.25 TCY – TPD)

where: TCY = instruction cycle

TPD = propagation delay

Therefore, at higher clock frequencies, a

write followed by a read may be problematic.

(Read PORTB)

Port pin

written here

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