PIC12F508_09 datasheet(41/110 Pages) MICROCHIP

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DS41236E-page 41

PIC12F508/509/16F505

7.0

SPECIAL FEATURES OF THE

CPU

What

sets

microcontroller

apart

from

other

processors are special circuits that deal with the needs

of real-time applications. The PIC12F508/509/16F505

microcontrollers have a host of such features intended

to maximize system reliability, minimize cost through

elimination of external components, provide power-

saving operating modes and offer code protection.

These features are:

• Oscillator Selection

• Reset:

- Power-on Reset (POR)

- Device Reset Timer (DRT)

- Wake-up from Sleep on Pin Change

• Watchdog Timer (WDT)

• Sleep

• Code Protection

• ID Locations

• In-Circuit Serial Programming™

•Clock Out

The PIC12F508/509/16F505 devices have a Watchdog

Timer, which can be shut off only through Configuration

bit WDTE. It runs off of its own RC oscillator for added

reliability. If using HS (PIC16F505), XT or LP selectable

oscillator options, there is always an 18 ms (nominal)

delay provided by the Device Reset Timer (DRT),

intended to keep the chip in Reset until the crystal

oscillator is stable. If using INTRC or EXTRC, there is

an 18 ms delay only on VDD power-up. With this timer

on-chip, most applications need no external Reset

circuitry.

The Sleep mode is designed to offer a very low-current

Power-Down mode. The user can wake-up from Sleep

through a change on input pins or through a Watchdog

Timer time-out. Several oscillator options are also

made available to allow the part to fit the application,

including an internal 4 MHz oscillator. The EXTRC

oscillator option saves system cost while the LP crystal

option saves power. A set of Configuration bits are

used to select various options.

7.1

Configuration Bits

The

PIC12F508/509/16F505

Configuration

Words

consist

bits.

Configuration

bits

can

programmed to select various device configurations.

Three bits are for the selection of the oscillator type;

(two bits on the PIC12F508/509), one bit is the

Watchdog Timer enable bit, one bit is the MCLR enable

bit and one bit is for code protection (Register 7-1,

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