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EM357-RTR Folha de dados(PDF) 50 Page - List of Unclassifed Manufacturers |
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EM357-RTR Folha de dados(HTML) 50 Page - List of Unclassifed Manufacturers |
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50 / 240 page ![]() EM351 / EM357 7 GPIO (General Purpose Input / Output) The EM35x has 24 multi-purpose GPIO pins that may be individually configured as: General purpose output General purpose open-drain output Alternate output controlled by a peripheral device Alternate open-drain output controlled by a peripheral device Analog General purpose input General purpose input with pull-up or pull-down resistor The basic structure of a single GPIO is illustrated in Figure 7-1. Figure 7-1. GPIO Block Diagram A Schmitt trigger converts the GPIO pin voltage to a digital input value. The digital input signal is then always routed to the GPIO_PxIN register; to the alternate inputs of associated peripheral devices; to wake detection logic if wake detection is enabled; and, for certain pins, to interrupt generation logic. Configuring a pin in analog mode disconnects the digital input from the pin and applies a high logic level to the input of the Schmitt trigger. Only one device at a time can control a GPIO output. The output is controlled in normal output mode by the GPIO_PxOUT register and in alternate output mode by a peripheral device. When in input mode or analog mode, digital output is disabled. 7.1 GPIO Ports The 24 GPIO pins are grouped into three ports: PA, PB, and PC. Individual GPIOs within a port are numbered 0 to 7 according to their bit positions within the GPIO registers. Note: Because GPIO port registers’ functions are identical, the notation Px is used here to refer to PA, PB, or PC. For example, GPIO_PxIN refers to the registers GPIO_PAIN, GPIO_PBIN, and GPIO_PCIN. 7-1 120-035X-000D Preliminary |
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